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<SEC-DOCUMENT>0000950172-03-003534.txt : 20031218
<SEC-HEADER>0000950172-03-003534.hdr.sgml : 20031218
<ACCEPTANCE-DATETIME>20031218144225
ACCESSION NUMBER:		0000950172-03-003534
CONFORMED SUBMISSION TYPE:	6-K
PUBLIC DOCUMENT COUNT:		2
CONFORMED PERIOD OF REPORT:	20031215
FILED AS OF DATE:		20031218

FILER:

	COMPANY DATA:	
		COMPANY CONFORMED NAME:			ASML HOLDING NV
		CENTRAL INDEX KEY:			0000937966
		STANDARD INDUSTRIAL CLASSIFICATION:	SPECIAL INDUSTRY MACHINERY, NEC [3559]
		IRS NUMBER:				000000000
		FISCAL YEAR END:			1231

	FILING VALUES:
		FORM TYPE:		6-K
		SEC ACT:		1934 Act
		SEC FILE NUMBER:	000-25566
		FILM NUMBER:		031062082

	BUSINESS ADDRESS:	
		STREET 1:		DE RUN 1110
		CITY:			LA VELDHOVEN NE
		STATE:			P7
		ZIP:			5503
		BUSINESS PHONE:		3140580800

	FORMER COMPANY:	
		FORMER CONFORMED NAME:	ASM LITHOGRAPHY HOLDING NV
		DATE OF NAME CHANGE:	19950215
</SEC-HEADER>
<DOCUMENT>
<TYPE>6-K
<SEQUENCE>1
<FILENAME>lon330837.txt
<DESCRIPTION>FORM 6-K
<TEXT>
                       SECURITIES AND EXCHANGE COMMISSION
                             WASHINGTON, D.C. 20549
                             ______________________

                                    FORM 6-K

                           REPORT OF A FOREIGN ISSUER
                       PURSUANT TO RULE 13A-16 OR 15D-16
                     OF THE SECURITIES EXCHANGE ACT OF 1934
                        FOR THE MONTH OF NOVEMBER 2003

                             ______________________

                               ASML HOLDING N.V.

                                  De Run 6501
                               5504 DR Veldhoven
                                The Netherlands
                    (Address of principal executive offices)
                             ______________________

Indicate by check mark whether the registrant files or will file annual reports
under cover of Form 20-F or Form 40-F.

                            Form 20-F [x] Form 40-F [ ]

Indicate by check mark whether the registrant by furnishing the information
contained in this Form is also thereby furnishing the information to the
Commission pursuant to Rule 12g3-2(b) under the Securities Exchange Act of
1934.

                                   Yes [ ] No [x]

If "Yes" is marked, indicate below the file number assigned to the registrant
in connection with Rule 12g3-2(b):
<PAGE>

EXHIBITS

99.1     "ASML to Redeem 4.25% Convertible Subordinated Notes 1999 due 2004,"
         dated November 4, 2003.

99.2     "ASML Updates Market on Innovations and Operations," dated November
         12, 2003.

99.3     "Dainippon Screen and ASML collaborate on Photolithography Processes
         and Performance," dated November 19, 2003.

99.4     "ASML and TEL Form Strategic Alliance," dated November 25, 2003.

99.5     "Closing Comments by Doug Dunn", presentation dated November 13, 2003.

99.6     "Toward Operational Excellence by Stuart McIntosh," presentation dated
         November 13, 2003.

99.7     "ASML Lithography Markets & ASML's Growth Opportunites by Boudewijn
         Sluijk and Rob Verstraelen," presentation dated November 13, 2003

99.8     "Maskless Lithography Introduction by Bert Koek," presentation dated
         November 13, 2003.

99.9     "Value Sourcing Philosophy and Implementation by Henk Scheepers,"
         presentation dated November 13, 2003.

99.10    "Road Map Update by Martin van den Brink," presentation dated November
         13, 2003."

99.11    "XT1250/Twinscan Value of Ownership by Peter Jenkins," presentation
         dated November 13, 2003.

99.12    "157nm Imaging Project Review by Kurn Rowe," presentation dated
         November 13, 2003.

99.13    "Immersion Lithography Review by Kurt Ronse," presentation dated
         November 13, 2003.

         "Safe Harbor" Statement under the U.S. Private Securities Litigation
Reform Act of 1995: the matters discussed in this document may include
forward-looking statements that are subject to risks and uncertainties
including, but not limited to, economic conditions, product demand and industry
capacity, competitive products and pricing, manufacturing efficiencies, new
product development, ability to enforce patents, the outcome of intellectual
property litigation, availability of raw materials and critical manufacturing
equipment, trade environment, and other risks indicated in filings with the
U.S. Securities and Exchange Commission.
<PAGE>


                                   SIGNATURES

         Pursuant to the requirements of the Securities Exchange Act of 1934,
the registrant has duly caused this report to be signed on its behalf by the
undersigned, thereunto duly authorized.

                                        ASML HOLDING N.V. (Registrant)

Date:  December 18, 2003                 By:    /s/ Peter T.F.M. Wennink
                                               ---------------------------------
                                               Peter T.F.M. Wennink
                                               Executive Vice President
                                               and Chief Financial Officer

</TEXT>
</DOCUMENT>
<DOCUMENT>
<TYPE>EX-99
<SEQUENCE>3
<FILENAME>lon1248.txt
<DESCRIPTION>EXHIBIT 99 - SLIDE PRESENTATION
<TEXT>
                                                                    EXHIBIT 99.1



ASML TO REDEEM 4.25% CONVERTIBLE SUBORDINATED NOTES 1999 DUE 2004

Veldhoven, the Netherlands -November 4, 2003 - ASML Holding NV (ASML) today
announced that in accordance with Section 5(2) of the Terms and Conditions of
the 4.25% Convertible Subordinated Notes 1999 due 2004 of ASML Holding N.V. set
forth as Annex 1 to the Global Certificates representing the Notes, dated as of
November 30, 1999, ASML Holding N.V. has exercised its option to redeem, and
does hereby call for redemption and will redeem on December 5, 2003 all of the
Company's outstanding Notes at a redemption price of 100.85% of the outstanding
principal amount of the Notes being redeemed, plus accrued interest up to, but
not including, the redemption date.

About ASML

ASML is the world's leading provider of lithography systems for the
semiconductor industry, manufacturing complex machines that are critical to the
production of integrated circuits or chips. Headquartered in Veldhoven, the
Netherlands, ASML is traded on Euronext Amsterdam and NASDAQ under the symbol
ASML.

ASML
Tom McGuire
Vice President Communications
corpcom@asml.com
+31.40.268.5758
+31.40.268.3655

ASML
Elizabeth Kitchener
Director Corporate Communications
corpcom@asml.com
+31.40.268.2602
+31.40.268.3655

ASML
Doug Marsh
Vice President Institutional Investor Relations U.S.
doug.marsh@asml.com
+1.480.383.4006
+1.480.383.3976

ASML
Craig DeYoung
Director Investor Relations
craig.deyoung@asml.com
+31.40.268.3938
+31.40.268.3655



<PAGE>

                                                                    EXHIBIT 99.2

ASML UPDATES MARKET ON INNOVATIONS AND OPERATIONS

Positive Immersion Program Results Revealed

Veldhoven, the Netherlands - November 12, 2003 - ASML Holding NV (ASML) in a
meeting tomorrow with investors and financial analysts will highlight several
of the company's operational and technological developments.

ASML will review its updated technology roadmap in response to future imaging
challenges as the demand for `shrink' (smaller features) continues.
Capabilities and customer benefits of ASML's recently launched TWINSCAN(TM)
XT:1250 system will be detaileD. Europe's largest independent R&D center IMEC
will present a synopsis of its 157 nm project, conducted on the ASML Micrascan
VII. Maskless lithography technology will be explained and the market
opportunity explored. From a business infrastructure perspective, ASML will
review accomplishments from cost-cutting measures in operations and suppliers'
improvements in cost and flexibility.

Positive Immersion Program Results

The ASML Analyst Day agenda includes a presentation on the early successes
achieved by the company in its immersion lithography program. The market for
immersion lithography tools is projected to go from zero to US$ 230 million by
2005, according to industry analysts.

Immersion lithography replaces the air between the wafer and the lens with
fluid to improve depth of focus and extend wavelengths to lower nodes. ASML
began exploring this technology in the first half of 2002 and, in early 2003,
began testing immersion processes on its TWINSCAN(TM) lithography systems.
Initial, positive results from the program include:

      o  ASML has a unique competitive advantage in immersion due to the
         dual-stage design of its TWINSCAN system. The immersion fluid needed
         for imaging can be applied between the wafer and the lens at one stage
         (the exposure station) while the measuring of the wafer -- focus and
         overlay - is completed in the other, dry stage (the metrology
         station). Customers continue to measure in air rather than incurring
         the costs of new calibration processes needed for `wet' metrology.

      o  ASML's existing lens designs can be easily adapted to immersion
         without an optical redesign.

      o  Through immersion, ASML can extend the life of the current 193 nm
         node. This allows customers to continue to benefit from existing
         technology investments.

      o  ASML can apply immersion processes to 157 nm technology as a solution
         reaching below the 45 nm node.

All presentations from ASML Analyst Day will be available on the company's Web
site at ASML.com on Thursday, November 13, 2003.

About ASML

ASML is the world's leading provider of lithography systems for the
semiconductor industry, manufacturing complex machines that are critical to the
production of integrated circuits or chips. Headquartered in Veldhoven, the
Netherlands, ASML is traded on Euronext Amsterdam and NASDAQ under the symbol
ASML.

ASML
Tom McGuire
Vice President Communications
corpcom@asml.com
+31.40.268.5758
+31.40.268.3655

ASML
Elizabeth Kitchener
Director Corporate Communications
corpcom@asml.com
+31.40.268.2602
+31.40.268.3655

ASML
Doug Marsh
Vice President Institutional Investor Relations U.S.
doug.marsh@asml.com
+1.480.383.4006
+1.480.383.3976

ASML
Craig DeYoung
Director Investor Relations
craig.deyoung@asml.com
+31.40.268.3938
+31.40.268.3655




<PAGE>

                                                                    EXHIBIT 99.3

DAINIPPON SCREEN AND ASML COLLABORATE ON PHOTOLITHOGRAPHY PROCESSES
AND PERFORMANCE

Kyoto, Japan and Veldhoven, the Netherlands, November 19, 2003 - ASML Holding
NV (ASML) and Dainippon Screen Manufacturing Co., Ltd. (Dainippon Screen) have
entered into an agreement to develop seamless litho-clustering methods.
Litho-cluster is the linking of track and lithography systems used in
semiconductor manufacturing.

Dainippon Screen and ASML will accomplish this goal by installing Dainippon
Screen's track systems in the ASML Development Laboratory in Veldhoven, the
Netherlands. Customers will benefit from closer cooperation between track and
lithography vendors as improved litho-clustering techniques and technology
increase productivity and CD control.

Current litho-cluster integration methods use very basic wafer transfer
scenarios resulting in inconsistent timing between the processes and slower
throughput. The joint program will create interface controls for making tracks
and scanners function as a single system and explore performance capabilities
and process enhancements.

"Dainippon Screen is proud to partner with ASML in this endeavor," said Mr.
Takashige Suetake, COO and president, Semiconductor Equipment Company,
Dainippon Screen. "Increased sophistication of the track and scanner interface
will be necessary to meet future lithography requirements and provide our
customers with the technology and productivity enhancements they need."

"ASML is committed to the integration of track and lithography systems for the
benefit of our customers. This strategic collaboration with Dainippon Screen
focuses on developing seamless litho-clustering methods for existing and
next-generation technology. Customers should soon see such improvements as
increased productivity and linewidth control in their litho-cluster performance
resulting from collaborations between lithography and track suppliers," said
Martin van den Brink, executive vice president, marketing and technology, ASML.

The two companies will also optimize the process performance required for
next-generation optical lithography, including high-NA ArF, immersion ArF and
F2 (157 nm) lithography. In addition, the collaboration will develop Automated
Process Control (APC) systems using integrated metrology units installed in the
track.

Dainippon Screen will install its 300-mm RF3 coater/developer system to
establish proof of concept and explore performance capabilities and process
enhancements. Installation is slated for November 2003. Higher volume tool
shipments are scheduled to begin January 2004. The RF3 is configured to provide
150 wafers per hour throughput for advanced process flows. Dainippon Screen
announced plans to increase the throughput to 180 wafer per hour by 2006. The
RF3 will be linked with an ASML TWINSCAN(TM) system.

About Dainippon Screen
Dainippon Screen Manufacturing Co., Ltd. was established in 1943 and is one of
the leading suppliers of semiconductor fabrication equipment. All of the
company's production sites are certified for ISO9001 as well as for ISO14001
Environmental Management System. Dainippon Screen is a public company quoted on
the Tokyo Stock Exchange. Home page: http://www.screen.co.jp/

About ASML
ASML is the world's leading provider of lithography systems for the
semiconductor industry, manufacturing complex machines that are critical to the
production of integrated circuits or chips. Headquartered in Veldhoven, the
Netherlands, ASML is traded on Euronext Amsterdam and NASDAQ under the symbol
ASML.

Dainippon Screen
Takayuki Hanafusa
Semiconductor Business Planning
+81.75.417.2527

Dainippon Screen
George Petricich
Product Marketing
+408.523.9140

ASML
Tom McGuire
Vice President Communications
corpcom@asml.com
+31.40.268.5758
+31.40.268.3655

ASML
Elizabeth Kitchener
Director Corporate Communications
corpcom@asml.com
+31.40.268.2602
+31.40.268.3655

ASML
Doug Marsh
Vice President Institutional Investor Relations U.S.
doug.marsh@asml.com
+1.480.383.4006
+1.480.383.3976

ASML
Craig DeYoung
Director Investor Relations
craig.deyoung@asml.com
+31.40.268.3938
+31.40.268.3655


<PAGE>

                                                                    EXHIBIT 99.4

ASML AND TEL FORM STRATEGIC ALLIANCE

VELDHOVEN, the Netherlands and TOKYO, Japan, November 25, 2003 - ASML Holding
NV (ASML) and Tokyo Electron Limited (TEL) today announced an agreement to
enhance litho-cluster productivity and process performance through joint
development programs and to facilitate customer demonstrations in Japan, the
Netherlands and the U.S. through multiple tool exchanges. A litho-cluster is
the linking of coater/developers and lithography systems used in semiconductor
manufacturing.

ASML, the leading provider of lithography systems, and TEL, the technology
leader for coater/developers, will leverage their combined resources to improve
imaging performance and litho-cluster productivity to 150 wafers per hour.
Current state-of-the-art photolithography equipment employs both scanners and
coater/developers as loosely coupled individual tools with many processes that
are independently optimized. Tighter coupling of these tools is required to
meet the demands of chip manufacturers.

The companies will work in joint development programs to identify, formulate
and develop solutions for litho-cluster challenges in current and
next-generation lithography, including high-NA ArF, immersion ArF and F2 (157
nm). This alliance marks the next logical step in an ongoing, collaborative
relationship between the two companies.

"ASML is committed to the Japan market and pleased to be partnering with
industry-leader TEL. The integration of coater/developers and lithography
systems will benefit our customers who are under pressure to produce more and
better chips. Having demonstration centers available on three continents means
more chipmakers will be able to see our productivity advantages," said Doug
Dunn, president and CEO, ASML.

Ken Sato, president and CEO, TEL said, "I firmly believe that our alliance with
ASML will contribute to development in the area of lithography and will help us
to achieve further customer satisfaction. The exchange program will enable us
to quickly optimize cluster tool performance and will provide TEL and ASML with
advanced demo capabilities in Europe, Japan and the U.S."

In early 2004, the companies will exchange tools and resources to facilitate
the joint development programs. ASML and TEL will install litho-clusters in
Europe, Japan and the U.S. based on ASML's TWINSCAN(TM) system and TEL's
coater/developer, the CLEAN TRACK LITHIUS(TM), CLEAN TRACK ACT(R) 12 and CLEAN
TRACK ACT(R) 8. The tool exchange gives both companies the capability to use
the latesT scanner and coater/developer technology for litho-cluster customer
demonstrations, qualification and development purposes. ASML and TEL will have
first results and demos available in the second half of 2004. The companies
also plan to create improvement packages to meet semiconductor industry demand
for best-in-class performance production equipment.

About ASML

ASML is the world's leading provider of lithography systems for the
semiconductor industry, manufacturing complex machines that are critical to the
production of integrated circuits or chips. Headquartered in Veldhoven, the
Netherlands, ASML is traded on Euronext Amsterdam and NASDAQ under the symbol
ASML.

About TEL

TEL, commemorating its 40-year anniversary this month, is a leading supplier of
innovative semiconductor and FPD production equipment worldwide. Product lines
include coater/developers, thermal processing systems, dry etchers, CVD
systems, wet cleaning systems and test systems. In Japan, TEL distributes other
leading edge semiconductor equipment tools, such as metrology tools or process
control systems. In addition, TEL distributes high quality computer systems,
semiconductor devices and electronic components of other leading suppliers, as
well as computer network related products from around the world. To support
this diverse product base, TEL has strategically located research &
development, manufacturing, sales, and service locations all over the world.
TEL is a publicly held company listed on the Tokyo Stock Exchange.

ASML
Tom McGuire
Vice President Communications
corpcom@asml.com
+31.40.268.5758
+31.40.268.3655

ASML
Elizabeth Kitchener
Director Corporate Communications
corpcom@asml.com
+31.40.268.2602
+31.40.268.3655

ASML
Doug Marsh
Vice President Institutional Investor Relations U.S.
doug.marsh@asml.com
+1.480.383.4006
+1.480.383.3976

ASML
Craig DeYoung
Director Investor Relations
craig.deyoung@asml.com
+31.40.268.3938
+31.40.268.3655

<PAGE>

                                                                    EXHIBIT 99.5



Slide 1


Closing Comments


Doug Dunn

President and CEO

Analyst's Day - Veldhoven the Netherlands

November 13, 2003


Slide 2


Update on Cash generation Program

(Amounts in Euro millions)                   30-Jun-02    30-Sep-03

Cash                                          P.M.           P.M.

Accounts receivable                           555            301     46%   25%

Inventory                                     871            676     22%   10%

Deferred tax assessment                       337            384    (14%)  15%

Other assets                                  265            220     17%   30%

Property, plant and equipment                 572            393     31%   10%

Intangible assets                              15             16     (7%)

Net assets and liabilities held for sale       89             19     82%

                                            2,704          2,009    695

Accounts payable                              275            148   (127)

                                     Realised Cash proceeds:        568

Note: numbers not audited and are restated for discontinued operations


Slide 3

ASML is Committed


     o   ASML's development power and flexibility secures ongoing technology
         leadership and supports ASML's Value of Ownership proposition

     o   ASML's operation is becoming fit and flexible, addressing cost, lead
         time, cycle time, value pricing and customer demand

     o   ASML's current market position + further customer penetration +
         lithography leverage = OPPORTUNITY


<PAGE>


                                                                    EXHIBIT 99.6


Slide 0

ASML Analyst Day


November 12-13, 2003


Slide 1


                                     ASML

Toward Operational Excellence

Stuart McIntosh

Executive Vice President of Operations

Analyst's Day - Veldhoven the Netherlands

November 13, 2003



Slide 2

Safe Harbor


     "Safe Harbor" Statement under the U.S. Private Securities Litigation
     Reform Act of 1995: the matters discussed during this presentation
     include forward-looking statements that are subject to risks and
     uncertainties including, but not limited to, economic conditions, product
     and pricing, manufacturing efficiencies, new products development,
     ability to enforce patents, availability of raw materials and critical
     manufacturing equipment, trade environment, and other risks indicated in
     filings with the U.S. Securities and Exchange Commission.



Slide 3

ASML is Committed

As ASML operates in a highly competitive and cyclical global market

     o   ASML will perform at world-class levels for our customers and against
         our competitors

            o  To gain market share

     o   ASML will continue with an aggressive Technical Roadmap

            o  To maintain our competitive advantage

     o   ASML will continue to drive its Value Sourcing philosophy

            o  To improve the outsourcing model


Slide 4

ASML Transitions

o        From technology leadership

            1985               1991              2001

          PAS 2500           PAS 5500          TWINSCAN


o        To market leadership

[Graphic omitted]



Slide 5

Toward Operational Excellence


     o   The market rightly expects superior returns from this industry and
         from our company.

     o   ASML will:

            o  Improve margins

                  o   Reduce Costs

                         o  Cost of Operations

                         o  Cost of Goods

            o  Maintain Pricing

                  o   Maintain competitive advantage

            o  Manage Capital Employed (working capital)

                  o   Decrease Accounts receivables (days outstanding)

                  o   Increase Inventory Turns


Slide 6

Accomplishments - ASML Goods Flow


From our suppliers we expect:

Shared market commitment - the QLTC program
Market flexibility, Just-In-Time delivery and lead-time reduction

ASML and our suppliers are dealing with increased market risk

o    ASML no longer absorbs the cost of inflexibility

o    ASML understands the problems and benefits of supply chain flexibility

o    The supplier is responsible for adequate lead-times

o    The supplier is delivering on time to ASML's requests



Slide 7

ASML Goodsflow (Continued)


o    Decreased inventories by 29% since this time last year.

o    Increased raw material and WIP inventory turns by 47%.

o    Decreased TWINSCAN cycle times by 25% since this time last year.

o    Reduced TWINSCAN Body COGs by 17% since this time last year.

o    Improved goodsflow processes have helped drive A/R days outstanding down
     from 125 days (Q3 2003) to below 75 days at present.



Slide 8

Accomplishments - ASML Customers Support

o    Reduced Service Parts Inventory by 21% since this time last year

o    Reduced and re-balanced Customer Support headcount with focus on Asia.

We can do this without compromise to Customer Service levels because.........

We have increased the reliability of TWINSCAN and improved its performance



Slide 9

Conclusion


o    The environment we operate in is tough

o    We will continue to focus on Quality, Logistics, Technology and Costs

o    We will strive for Operational Excellence in all phases of the cycle



Slide 10


                                     ASML



                                  COMMITMENT


<PAGE>

                                                                    EXHIBIT 99.7



Slide 1


                                     ASML

                              Lithography Markets

                                       &

                          ASML's Growth Opportunities


                       Boudewijn Sluijk, Rob Verstraelen

                          ASML Product Marketing MCC



Slide 2


Safe Harbor

     "Safe Harbor" Statement under the U.S. Private Securities Litigation
     Reform Act of 1995: the matters discussed during this presentation
     include forward-looking statements that are subject to risks and
     uncertainties including, but not limited to, economic conditions, product
     and pricing, manufacturing efficiencies, new products development,
     ability to enforce patents, availability of raw materials and critical
     manufacturing equipment, trade environment, and other risks indicated in
     filings with the U.S. Securities and Exchange Commission.



Slide 3

ASML has done very well:

>50% $ market share in 2002

[Graphic omitted]




ASML has done very well!
How can growth continue?



Slide 4


Projections for lithography markets


[Graphic omitted]

o    Volume projections are lower
o    Cycles remain



Slide 5

Litho volume projections are lower


Two key drivers:

     o   Lower long term CAGR IC sales

     o   Higher productivity lithography tools

     o   300 mm productivity

Litho as fraction of IC equipment has been constant

     o   with upside potential



Slide 6


Litho as percentage of total wafer fab equipment

[Graphic omitted]


Litho as fraction of
Semi equipment
has been constant



Slide 7


Higher productivity 300 mm tools

Take a fairly large 300 mm wafer fab:

o    Capacity:                                       30,000 WSpM

o    Output:                       ~ 0.7 % of world market in `03
                                   (in terms of units shipments)

o    # Litho tools:                                          30

o    Fabs needed world-wide for 9% growth:                   12

o    Hence: world-market for litho                    360 tools

                                     (if 100% 300mm tools sold)


                          Average litho market (200 +
                            300 mm):~500-550 tools



Slide 8


Litho ASP is ASML's growth opportunity


[Graphic omitted]



Can ASP growth be sustained?



Slide 9

Our customers sell silicon at constant price/sq.inch



[Graphic omitted]


Si revenue per square inch ~constant



Slide 10


Average of IC die size is ~constant

[Graphic omitted]


Value delivered as more
powerful ICs, not smaller ICs



Slide  11


Growth is in semiconductor unit sales

[Graphic omitted]

Continued growth in IC unit sales



Slide 12


How many litho tools does this require?


[Graphic omitted]


IC volume needs will be met with ~500-550 tools



Slide 13


Long term trends in litho food chain


[Graphic omitted]


Is WW litho budget enough to support ASP?



Slide 14


Litho tool ASP fits the budget


[Graphic omitted]


Bottom-up ASP projections are realistic



Slide 15


Litho ASP growth is in 300mm & leading edge

ASP growth can be realized in 2 areas

     o   300mm production tools

     o   leading edge technology tools



Slide 16


[Graphic omitted]

300 mm is always attractive,
especially for (high) volume

=> larger customers will be first to 300 mm



Slide 17


Leading edge technology remains attractive


[Graphic omitted]


Shrinking IS attractive...
and more so for high volume applications



Slide 18


Technology markets
based on customer roadmaps

Islands:  Volume demand


Technology volume:
o  Few critical layer tools
o  Highest volume 3-5 years later

Vertical:  Timing

Horizontal:  Resolution needs



Slide 19


Technology market share projections


[Graphic omitted]


Technology volume '3-'07:
o KrF largest segment
o ArF highest growth rate



Slide 20


70% of top 20 spenders choose ASML


                    Top 20 estimated capex budgets for 2003

Rank       Company                  Capex ($mil)      ASML Customer

1          Intel                    3700

2          Samsung                  3500

3          TSMC                     1200

4          IBM                      1150

5          Micron                   1000

6          STMicroelectronics       1000
                                                             70%
7          Infineon Technologies    950                      is
                                                            ASML
8          Texas Instruments        800                   customer

9          Sony                     800

10         Toshiba                  746

11         Renesas                  725

12         AMD                      650

13         Inotera                  650

14         Elpida                   647

15         Matsushita               600

16         NEC                      511

17         SMIC                     500

18         UMC Group                500

19         GSMC                     400

20         Hynix                    400

ASML is well positioned



Slide 21


Recovery in Semi sales gaining momentum
     and already started in January


Semiconductor Sales


[Graphic omitted]



Slide 22


Applications Markets:
No New "Killer" Application?


[Graphic omitted]


3 Phase Recovery Unfolding:
- --------------------------

o        Digital Cellular (Consumer)

o        PCs (Business)

o        Broad-based (Economic)

Key Trends:
- ----------

o        Mobile

o        Wireless

o        Digital Video

o        Broadband

o        Form Factor

o        Equipment Convergence

o        Device / Package Integration

o        Power Consumption



Slide 23


Recovery in equipment started in Q3



WW Total WFE Bookings & Billings


[Graphic omitted]



Slide 24


Conclusion


[Graphic omitted]


To continue growth in lithography:

o   Build on two pillars

       o  high ASP tools

       o  volume markets

o   Focus on larger customers

o   Adjust for lower unit volumes


<PAGE>

                                                                    EXHIBIT 99.8





Slide 1


                              ASML LOGO OMITTED



Optical Maskless Lithography



Bert Koek
November 13, 2003



Slide 2


Safe Harbor

     "Safe Harbor" Statement under the U.S. Private Securities Litigation
     Reform Act of 1995: the matters discussed during this presentation
     include forward-looking statements that are subject to risks and
     uncertainties including, but not limited to, economic conditions, product
     and pricing, manufacturing efficiencies, new products development,
     ability to enforce patents, availability of raw materials and critical
     manufacturing equipment, trade environment, and other risks indicated in
     filings with the U.S. Securities and Exchange Commission.



Slide 3


Optical Maskless Lithography


     o   Margins in Semiconductor industry can vary significantly

     o   Margins can be Influenced by:

            o  Time to Market: Premium price for better performance or new
               application

            o  Cost control: Lower overall production cost

     o   ASML defined a concept based on Maskless Lithography where both Time
         to Market improvement and Lowering Cost can be achieved, while
         maintaining compatible with Optical lithography processes

     o   Market Potential 300-800M(euro) / year



Slide 4


Device introduction activity flow

|--Design Introduction-------->18 months-------|--------- Mask Respin-------|
|                                              |                            |
|                                              |                            |
|                                              |                            |
|--Start-------Design---Release--Mask making---|----Release>----Mask Respin-|

      Long lead times in Release:
      Many iterations                                        Respin reasons
      Complicated simulations
      Limited early proto typing                            [Graphic omitted]


      Mask Respin:
      Additional cost
      Additional lead time



Slide 5


Escalating Mask Set Cost for future technology nodes


[Graphic omitted]


o   High Mask costs result in:
         - Reduced opportunity for early prototyping and lead time reduction
         - High cost due to Mask Respin



Slide 6

How optical mask-less helps



- -Design Introduction------>---->18 months----|->----Mask Respin---->------|
|                                            |                            |
|                                            |                            |
|                                            |                            |
|Start-->----Design---Release--Mask making-->|    Release     Mask Respin |
|                                            |
|                                            |
|Start-->----Design---Release ------->Release|
|                                            |
|-------------------12 months----------------|



 o  Mask-less technology reduces:
        - Release and mask making cycle time
        - Cost for proto typing and Mask Respin



Slide 7


Overview

o    ASML and Micronic started 2.5 years ago a joint study program to explore
     the feasibility of maskless lithography based on the technology of both
     companies.

o    ASML and Micronic have concluded based on this study:

     a - 5Wph - Optical Maskless Lithography Scanner is feasible for the 65nm
     node, based on Twinscan (ASML) and Sigma (Micronic) technology.

o    ASML and Micronic are in the process of getting commitment from potential
     customers.

o    Subject to this commitment, an ASML - Micronic will establish a Joint
     Venture to develop this product.



Slide 8


Spatial light modulator in mask-less scanner


[Graphic omitted]


                                             Micronic SLM chip
                                             8 mm x 33mm active area
                                             1.048 Mpixels (512 x 2048 pixels)
                                             Each pixel 16X16um2



Slide 9


Productivity: Data Rate Impact


     o   Productivity determined by data rate towards SLM

         o  Array of individual SLM's will be used

     o   Assumptions:

         o  300mm Wafer size

         o  5 WPH

         o  30nm Pixel size

         o  Dual pass

         o  8 bits/pixel

     o   Result: 200-300 Gbyte/s


         Printing 360 000 pages with text and images per second or filling
         bookshelves with SPIE Proceedings at 70 miles per hour!



Slide 10


Data-Path: Principle of Loading and Writing a Pattern

1.   Break field into stripes.

2.   Break stripe into micro-stripes. Each micro-stripe spans part of a row of
     SLMs in the array.

3.   Load full micro-stripe into each overlapping SLM's sub-array controller.

4.   Array of pointers are used to address the position of the next micro-shot
     in the micro-stripe. This pointer determines the pattern data to be
     included in next micro-shot.

5.   For each micro-shot, apply pixel calibration data and send combined image
     to SLM.

6.   Wafer is printed by controlling the sequence of micro-shots and
     micro-stripes across all SLMs in the array.

[Graphic omitted]



Slide 11


Example: OPC with Gray Scaling (Prolith)


Without OPC

Example shows lines on mirror
grid. Off-grid lines achieved
with different tilt angles.


[Graphic omitted]


With OPC

[Graphic omitted]

Slide 12


The envisaged Maskless Lithography System (MLS)


o    Target specifications:

     o   Platform: TWINSCAN

     o   Throughput: 5 wph (300mm)

     o   Technology: 193nm

     o   Applicability: 65nm node

o    Expected system availability:

     o   3 years after start of project

o    Price: Comparable with conventional scanners



Slide 13


Foundry like mask life distribution (200 mm)

               [Graphic omitted]

o    Most masks see 24 wafers ( = one wafer lot),

o    ASIC industry is moving to "sub-lot" production.

o    Industry is working to process single wafers.


                                            High volume runners:
                                            Basis of successful business model



o    The average number: 450wafers/mask

o    Median < 20 for many companies

o    Majority of reticles for early proto typing or need Respin



Slide 14


Reticle use based on Foundry data:
50% of reticles used to print 1% of wafers (200 mm);


               [Graphic omitted]


    For Maskless systems:
    High wafer throughput is not needed to save significant reticle costs




Slide 15


Mask Usage: Foundry
Data Scaled to 20 kWSPM @ 200mm

Expose 10 Critical Layers per Wafer using  1st 2nd  3rd Maskless Scanner


[Graphic omited]


                                                     Mean:     580 Wafers/Mask
                                                     Median:   20 Wafers/Mask


       1 Tool Saves > 50% of Masks, 2 More Tools save Additional 30%...




Slide 16


Mask-less practically eliminates fixed mask cost


^|             Maskless more economical
|         |------<-----<--------------|
|         |                           |-- Maskless Scanner
|         |                           |
|         |                           |
|         |                           |
|         |                           |-- Mask Scanner
|         |                           |
|         |   1/T put (mask)=1/100    |
Cost      |--------|------------------|------------
Per       |                           |
Run       |                           |
|         |                           |------->------->
|         | 1/T put (maskless)=1/5-10 |  With mask more economical
|         ---|------------------------|--------
|                            Breakeven # wafers
Small                        100-500 wafers
Data                         # of wafers ----->
Prep
Cost








Slide 17

Maskless Economic Model: Input Parameters

o    MLS specifications: 5 W/hr; Suitable for 65 nm node

o    Realistic mix of maskless (critical layers) and mask-based (non-critical
     layers)

o    Realistic Financial Figures

     o   5-y Tool depreciation

     o   Cost of Capital

     o   Return on Capital

     o   Taxes on MLS gain

     o   Clean room cost

o    Mask prices as projected


o    Tool Parameters

     o   Tool Cost ($) $25,000,000

     o   Throughput (wfr/hr) 5

     o   Utilization 50%

Mask Layers | 20 | 20 | 20 | 20
- -------------------------------
MLS Layers  | 10 | 12 | 14 | 16

o    Device / Wafer Data

     o   Wafer Dia. (mm) 300mm

     o   Die Size (mm / side) 8.50mm

     o   Wafers per Design 20

     o   MLS Designs / Year 70

     o   Re-spin Rate 30%


- --------------|-----------|-----------|-----------|----------
Mask Cost     |0.18 nm    |0.13 nm    |90 nm      |65 nm
- --------------|-----------|-----------|-----------|----------
Non-Critical  |$7,000     |$9,000     |$12,000    |$15,600
- --------------|-----------|-----------|-----------|----------
Critical-Bin  |$12,000    |$32,000    |$96,000    |$288,000
- --------------|-----------|-----------|-----------|----------
Critical-PSM  |$12,000    |$39,000    |$117,000   |$351,000
- --------------|-----------|-----------|-----------|----------



Slide 18

Maskless Economic Justification: Reduction of annual reticle costs and
customer ROI for 90nm Technology


<TABLE>
<CAPTION>
                    -------|--------|---------|---------|--------|---------|--------
                    1      |14      |27       |40       |53      |65       |78
- -------------------|-------|--------|---------|---------|--------|---------|--------
<S>                 <C>     <C>      <C>       <C>       <C>      <C>       <C>
Annual Mask        |$554   |$7,694  |$14,834  |$21,974  |$29,114 |$36,254  |$43,394
Savings MLS vs.    |       |        |         |         |        |         |
STD ($k)           |       |        |         |         |        |         |
- -------------------|-------|--------|---------|---------|--------|---------|--------
MLS MIRR (MLS vs.  |-10%   |9%      |21%      |29%      |36%     |41%      |46%
STD)               |       |        |         |         |        |         |
- -------------------|-------|--------|---------|---------|--------|---------|--------
</TABLE>


<TABLE>
<CAPTION>
- -------------------|----------|-----------|-----------| ------------|-----------|------------|-------------|------------
90 nm Designs/year |1         |12         |23         | 34          |45         |56          |67           |78
- -------------------|----------|-----------|-----------| ------------|-----------|------------|-------------|------------
<S>                 <C>        <C>         <C>          <C>          <C>         <C>          <C>           <C>
Annual Mask        |$1,938    |$23,319    |$44,700    | $66,080     |$87,461    |$108,891    |$130,222     |$151,603
Savings MLS vs.    |          |           |           |             |           |            |             |
STD ($k)           |          |           |           |             |           |            |             |
- -------------------|----------|-----------|-----------| ------------|-----------|------------|-------------|------------
MLS MIRR (MLS vs.  |-5%       |30%        |46%        | 58%         |66%        |73%         |80%          |85%
STD)               |          |           |           |             |           |            |             |
- -------------------|----------|-----------|-----------|-------------|-----------|------------|-------------|------------
</TABLE>


<TABLE>
<CAPTION>
5 year ROI, capped at 1 tool

20 Wafers per Design
- --------------------|------|-----|-----|-----|-----|-----|-----|-----
<S>                  <C>    <C>   <C>   <C>   <C>   <C>   <C>   <C>
Number of Annual    |      |12   |23   |34   |45   |56   |67   |78
Designs             |      |     |     |     |     |     |     |
- --------------------|------|-----|-----|-----|-----|-----|-----|-----
90 nm ROI on        |-10%  |9%   |21%  |26%  |29%  |36%  |41%  |46%
Number of           |      |     |     |     |     |     |     |
Design/Year         |      |     |     |     |     |     |     |
- --------------------|------|-----|-----|-----|-----|-----|-----|-----
90 nm MIRR on       |5%    |30%  |46%  |58%  |66%  |73%  |80%  |85%
Number of           |      |     |     |     |     |     |     |
Designs/Year
(MLS MIRR (MLS vs.  |      |     |     |     |     |     |     |
STD))               |      |     |     |     |     |     |     |
- --------------------|------|-----|-----|-----|-----|-----|-----|-----
</TABLE>



Slide 19


Mask-less practically eliminates fixed mask cost


^|
|      |                         |
|      |-------------------------|-- Maskless Scanner
|      |                         |
|      |                         |   MASK
|      |                         |
|      |                         |
|      |                         |
|      |   1/T put (mask) = 1/1  |
Cost   |                         |
Per    |                         |
Run    |                         |
|      |                         |
|      |                         |  Optimum Operating area for production Fab
|      --------------------------|--------
|      -----------------------------------
Small           # of wafers ----->
Prep
Cost



Slide 20

Current Wafer Fab


                              [Graphic omitted]



Slide 21

The New Wafer Fab Philosophy


                              [Graphic omitted]



Slide 22

Maskless Rationale : Summary

o        1. Maskless is a solution for three problems in the Semiconductor
         industry:

         o  Mask costs,

         o  Time To Market: design to wafer

         o  Eliminate a prohibiting cost factor for new designs

o        2. Optical Maskless because of:

         o  No fundamental throughput limitation

         o  Compatible with al low k1 solutions

         o  Process compatibility (E-beam is not compatible due to lower
            throughput and non compatibility with the Fab process)

o        3. TWINSCAN platform

         o  Platform compatibility and stability

         o  Reduction of development costs

         o  First delivery could be within 3 years after start of the program





Slide 23


ASML strategy for Optical Maskless Lithography

o    Basis Tool concept

     5Wph - Optical Maskless Lithography Scanner for the 65nm node, based on
     Twinscan (ASML) and Sigma (Micronic) technology.


o    Subject to commitment of potential customers, ASML - Micronic will
     establish a Joint Venture to develop this product.





Slide 24



                                     ASML



                                  COMMITMENT

<PAGE>


                                                                    EXHIBIT 99.9


Slide 1


ASML


Value Sourcing



Henk Scheepers

Senior Vice President Goodsflow

Analyst's Day - Veldhoven The Netherlands

November 13, 2003



Slide 2


Safe Harbor



     "Safe Harbor" Statement under the U.S. Private Securities Litigation
     Reform Act of 1995: the matters discussed during this presentation
     include forward-looking statements that are subject to risks and
     uncertainties including, but not limited to, economic conditions, product
     and pricing, manufacturing efficiencies, new products development,
     ability to enforce patents, availability of raw materials and critical
     manufacturing equipment, trade environment, and other risks indicated in
     filings with the U.S. Securities and Exchange Commission.



Slide 3

Goodsflow plays a key role in achieving ASML's goal of market share leadership

o        Market share leadership is based on 3 pillars

o        Customer Focus

o        Technological Leadership

o        Operational Excellence

o        In order to achieve this, we must be able to:

o        Serve a worldwide customer base

o        Maintain a supply base that is

         o     World Class

         o     Globally Competitive

         o     Globally Present

                                        The essence of
                                        VALUE SOURCING



Slide 4

Agenda


o        Goodsflow Strategy

o        Value Sourcing

o        Status Report

         o  Quality

         o  Logistics

         o  Technology

         o  total Cost

o        Questions & Answers



Slide 5

Goodsflow Strategy & Business Plan

Focus Points

Value of Ownership

Fulfilled Customer Requirements

Operational Excellence

Quality Logistics Technology Total Cost

World Class Mfg. & Installation

Value Sourcing

Right on Time


o        Zero Defects      Q

o        Reliability       L

o        Flexibility       L

o        Installs by GF    L

o        CT reduction      L

o        Release 4 Volume  T

o        CoG reduction     C





Slide 6

Supply Chain Structure


                              [Graphic omitted]




90% of CoG from Supply Base

600 Suppliers
o        60 partners (80% value)

o        Global Supply




Slide 7


Supply Chain - Behaviour

[graphic omitted]


                                                                 Customer
                                                                 Demand


                                                                 Output Plan

                                                                 Actual Output


Terms & Conditions


                                                        Supply Chain Inertia

                                                             FORRESTER
                                                              EFFECTS

Flexibility




Slide 8

Value Sourcing
Competitive Performance in the Supply Chain through QLTC

o        Quality

         o  Zero defects

o        Logistics

         o  Delivery Reliability

         o  Flexibility

               o  structural: +1 MR per 6 months

               o  burst: +1 MR for max. 30% per year, +2 MR for max. 15% per
                  year

         o  Short lead times, lowest inventory levels

         o  Parts availability > 15 years

o        Technology

         o  Timely technology roadmap fulfillment

         o  Effective Engineering Change Management

o        total Cost

         o  Competitive pricing

               o  meeting customers Value of Ownership

               o  open costing

         o  Order push-out and cancellations at shared cost


Slide 9

Supplier Account Team plays a key role
Establishing strategic focus



                              [Graphic omitted]


Slide 10


Ensure competitive performance
Today and in future

[graphic omitted]

o        Competitive Performance

         o  Quality

         o  Logistics

         o  Technology

         o  total Cost


Continuous Improvement

Long Term Agreement


                   Pro-actively managed by cross-functional
                            Supplier Account Teams



Slide 11


                            ASML SUPPLIER PROFILE



                              [GRAPHIC OMITTED]



Slide 12


Shared market commitment




                                          Forecast planning for max 18 months


                              [Graphic omitted]




                             Annual performance targets secure competitiveness




Slide 13


Sourcing Strategy

[graphic omitted]

                                                      o   Lenses
                                                      o   Handlers/stages
                                                      o   Lasers

o        Optics
o        Wafers

Multiple sourcing

                                   LEVERAGE
                                     ITEMS


                                              Multiple sourcing per competence
                                              Single/Dual sourcing per product
                                              Joint development / partnership

Single, dual, and
multi-sourcing

NON
CRITICAL
ITEMS

                                               Dual sourcing
                                               Joint Development / partnership

                              Risk Supply Market
                             Technology. Ownership
                              Number of Suppliers




Slide 14

Status Report
Overall


Strategic Principles

o        Long term relationships
o        Shared risk & reward
o        Less than 25% dependent
o        Global sourcing
o        Dual sourcing of knowledge
o        Single / dual / multiple sourcing
         of products


Supplier Account Teams
o        53 active (47 VHN, 6 WTN)
o        167 representatives from our suppliers
o        145 representatives from ASML
o        339 active improvement
         programs
         Q: 114 / L: 130 / T: 43 / C: 52

Long Term Agreements
o        18 signed
o        5 to go in 2003
o        21 to go in 2004



Slide 15


Status Quality


Overall Vendor Rating:

         11/02 12/02 01/03 02/03 03/03 04/03 05/03 06/03 07/03 08/03 09/03 10/03
- -------------------------------------------------------------------------------
#A or B   61%   61%   62%   68%   77%   83%   81%   83%   79%   79%   77%   80%


Delivery Performance:


<TABLE>
<CAPTION>

            11/02 12/02 01/03 02/03 03/03 04/04 05/03 06/03 07/03 08/03 09/03 10/03
- -------------------------------------------------------------------------------------
<S>          <C>   <C>   <C>   <C>   <C>   <C>   <C>   <C>   <C>   <C>   <C>   <C>
Target       98%   98%   98%   98%   98%   98%   98%   98%   98%   98%   98%   98%
- -------------------------------------------------------------------------------------
Avg. Clip2   85%   87%   85%   89%   91%   92%   93%   94%   93%   92%   94%   94%

</TABLE>




Slide 16


Logistics
Flexibility Measures

o        Assy / Fasy

         o   shift operations

o        Test

         o   automated testing

         o   operator call-out /
             remote testing

         o   flex shift operations

o        Pos / Neg work hours

o        Outsourcing WHS

o        Intro New Flex Model

[Graphic omitted]



Slide 17


Status Logistics
Internal Cycle Time Roadmap



[Graphic omitted]



Slide 18


Cycle Time Reduction
Examples

o    'Installs by Goodsflow'

     o   elimination of

         o  double testing

         o  hand-overs

         o  safety margins

     o   first hand knowledge of machine specifics in the field

o    'Flex Queue'

     o   automated, context driven (re)scheduling of test jobs

o    'Plug & Play'

     o   upstream resolution of technical problems and defects found during
         test phase

     o   maximizing upstream qualification of modules



Slide 19

Status Logistics
Order leadtime

Cumulative CoG Value per Order Moment category AT850C


                              [Graphic omitted]



Slide 20

Status Logistics
Relative Order Leadtime


                     Relative Order Leadtime Development


                       Aug-02              Oct-03
- -----------------------------------------------------------------
0-4 weeks                18%                 32%
- -----------------------------------------------------------------
5-8 weeks                29%                 33%
- -----------------------------------------------------------------
9-12 weeks               28%                 22%
- -----------------------------------------------------------------
More than
13 weeks                 26%                 13%
- -----------------------------------------------------------------







Slide 21



Status Technology

Improvement Proposals & Engineering Changes



                          % suppliers with > = 2 submitted IP's

          12/02  01/03 02/03 03/03 04/03 05/03 06/03 07/03 08/03 09/03 10/03
- -----------------------------------------------------------------------------
Target     100%  100%  100%  100%  100%  100%  100%  100%  100%  100%  100%
- -----------------------------------------------------------------------------
IP's>=2     60%   69%   85%   85%   87%   87%   87%   87%   87%   87%   88%

                         EC's implemented in Goodsflow

                               [Graphic omitted]




Slide 22

Status total Cost
Total Net Inventories


                              [Graphic omitted]




Slide 23


Key customer observation
June 2003


         Observations

         o  Excellent supply chain management

            - Goodsflow implementation
            - Overall approach "bottom up and top down"
            - Process itself: demand week, supply week and
              mgmt buy-in
            - Critical supplier management is world class
              (rating, selection, LTA process, CIP's, KPI's etc.)



Slide 24





                                     ASML



                                  COMMITMENT

<PAGE>

                                                                   EXHIBIT 99.10


Slide 1

ASML

The Roadmap: Shrink Will Continue Using
Cost-Effective Lithography

Martin van den Brink
Executive Vice President Marketing & Technology
Analyst Day, November 13, 2003


Slide 2

Safe Harbor

"Safe Harbor" Statement under the U.S. Private Securities Litigation Reform Act
of 1995: the matters discussed during this presentation include forward-looking
statements that are subject to risks and uncertainties including, but not
limited to, economic conditions, product and pricing, manufacturing
efficiencies, new products development, ability to enforce patents, availability
of raw materials and critical manufacturing equipment, trade environment, and
other risks indicated in filings with the U.S. Securities and Exchange
Commission.

ASML


Slide 3

Agenda

o    The shrink roadmap of our customers

o    Lithography shrink scenarios

     o    Wavelength reduction

     o    Aperture increase enabled by immersion

     o    Lowering the k1 factor

o    Special topics

     o    Immersion

     o    Maskless

o    Likely shrink scenarios

o    Conclusions

ASML


Slide 4

Logic and DRAM half-pitch roadmap

[Graphic omitted]


Slide 5

IC industry will continue to scale transistors


130 nm Node

[Graphic omitted]

70 nm Length
(Production 2001)

90 nmNode

[Graphic omitted]

50 nm Length
(Production in 2003)

65 nm Node

[Graphic omitted]

30 nm Prototype
(Production in 2005)

45 nm Node

[Graphic omitted]

20 nm Prototype
(Production in 2007)

32 nm Node

[Graphic omitted]

32 nm Node

[Graphic omitted]

15 nm Prototype
(Production in 2009)

ASML

Slide 6

The shrink roadmaps of our customers

o    The shrink continues

o    Significant variation in ambition of customers: node names become marketing
     names

o    DRAM continues to take the lead in density scaling driven by cost reduction

o    Logic will quickly follow DRAM in density and cost scaling but is
     challenged by performance improvements

o    Lithography is getting more difficult; design for manufacturing will become
     key to continuing shrink in the future, particularly for logic


Slide 7

Agenda

o    The shrink roadmap of our customers

o    Lithography shrink scenarios

     o    Wavelength reduction

     o    Aperture increase enabled by immersion

     o    Lowering the K1 factor

o    Special topics

     o    Immersion

     o    Maskless

o    Likely shrink scenarios

o    Conclusions

ASML


Slide 8

How to shrink in lithography

                         lambda                  lambda
o    Resolution = k1.  -----------      = k1.   --------
                       n.sin theta                 NA

     o    Resolution: half pitch

     o    k1: process factor, k1 < 0.25 no contrast

     o    lambda: wavelength of the exposure light in vacuum

     o    n: refractive index of the medium above wafer

     o    theta: maximum angle of the light incident on wafer

     o    NA: numerical aperture, NA = n.sin theta

                          n.resolution2
o        Depth of focus =----------------
                               lambda
ASML


Slide 9

Image contrast reduces by lowering the resolution

Conventional illumination, NA, k1 ~ 1.25

[Graphic omitted]

ASML


Slide 10

Image contrast reduces by lowering the resolution

Conventional illumination, NA, k1 ~ 0.50

[Graphic omitted]

ASML


Slide 11

Image contrast reduces by lowering the resolution

Conventional illumination, NA, k1 ~ 0.30

[Graphic omitted]

ASML


Slide 12

Modulation improves by increasing aperture

Conventional illumination, 2NA, k1 ~ 0.60

[Graphic omitted]

ASML


Slide 13

<TABLE>
<CAPTION>

How do k1, wavelength, and aperture work together?

Resolution = process factor k1 x wavelength / NA (half pitch)

 Method:               NA       365 nm       248            193 nm         157
                                i-line       KrF             ArF            F2
                    process
                    factor k1    0.65    0.63 > 0.80       0.63 > 0.95   0.70 > 0.95
<S>                   <C>        <C>      <C>   <C>        <C>   <C>      <C>   <C>
Conventional
 Stepper              0.60       335nm    235 > 185 nm

+ Off axis
 illumination         0.50       280nm    195 > 155 nm     155 > 101 nm   110 > 82 nm

PSM and / or
strong OAI + OPC      0.40                175 > 125 nm     125 > 82  nm    90 > 66 nm

All the tricks
 thin layer imaging   0.30                120 > 125 nm      90 > 61 nm     70 > 49 nm

No image
 "brick wall"        <0.25       140nm    100 >  75 nm       75 > 51 nm    55 > 42 nm
</TABLE>

ASML


Slide 14

Wavelength reductions are costly because of changed requirements for:

o    Photoresist - requiring new resist and process infrastructure after every
     wavelength change

o    The optical projection system - requiring new material development: Quartz
     for 248 nm, CaF2 for 193 and 157 nm

o    Mask materials - requiring material development: Quartz for 248 and 193 nm,
     doped Quartz for 157 nm ,and reflective mask for EUV

o    Mask contamination protection materials (pellicle) - requiring new
     materials: Quartz only for 157 nm, no pellicle possible with EUV

ASML


Slide 15

Sub 90-nm ArF ready for production implementation

AT:  1200, 193 nm, 0.ES NA, binary mark

[Graphic omitted]


A surfactinated rinse is applied in all presented
cases (OptiPattern(TM)Surface Conditioner)

ASML


Slide 16

157-nm equipment available, but processing still needs maturing

Micrascan VII,
157 nm, 0,75 NA,
binary mask


[Graphic omitted]



                             Dipole, XP2452 resist,
                                   80-nm L&S
                          through focus in 50-nm steps
                                Depth of Focus >
                                   0.4 (mu)m

ASML


Slide 17

Agenda

o    The shrink roadmap of our customers

o    Lithography shrink scenarios

     o    Wavelength reduction

     o    Aperture increase enabled by immersion

     o    Lowering the k1 factor

o    Special topics

     o    Immersion

     o    Maskless

o    Likely shrink scenarios

o    Conclusions


ASML


Slide 18

Increase in aperture = increase in lens complexity
Camera lens complexity scaling with NA at fixed focal length (all 50-mm lenses)

                        [Graphic omitted]

F = 1.8              F = 1.4              F = 1.0
NA = 0.28            NA = 0.35            NA = 0.5
6 lens elements      7 lens elements      11 lens elements
130 gram             290 gram             985 gram
100 (euro)           400(euro)            3000(euro)


ASML


Slide 19

Increase in aperture = increase in lens complexity

[Graphic omitted]



ASML


Slide 20

Technology reduces growth in lens complexity

o    Macro asphere technology reduces the number of lens elements and their size

o    Immersion shifts the complexity explosion to NA = n-liquid (the refractive
     index of the liquid)

o    Catadioptric lens designs ease color correction

o    Reducing the field size further reduces lens complexity

     o    Productivity loss can be compensated for by system improvements such
          as dual/fast stages

ASML


Slide 21

Agenda

o    The shrink roadmap of our customers

o    Lithography shrink scenarios

     o    Wavelength reduction

     o    Aperture increase enabled by immersion

     o    Lowering the k1 factor

o    Special topics

     o    Immersion

     o    Maskless

o    Likely shrink scenarios

o    Conclusions

ASML


Slide 22

Optimizing illumination improves resolution

Conventional illumination, NA, k1 ~ 0.30

[Graphic omitted]


ASML


Slide 23

 Optimizing illumination improves resolution

 Non conventional illumination, NA, k1 ~ 0.30

[Graphic omitted]


ASML


Slide 24

Low k1 imaging leads to small exposure/process tolerances

[Graphic omitted]

ASML


Slide 25

Low k1 imaging leads to small exposure/process tolerances

[Graphic omitted]


CD1 - (DELTA)CD1                       CD2 - (DELTA)CD2

Image linearity disappears, (DELTA)CD1 << (DELTA)CD2

DRAM makers can work at 20% lower k1 factor compared to LOGIC makers due to a
more repetitive and regular layout

ASML


Slide 26

Mask and system integration is needed to enable low k1

                   Source Mask Optimization

Illumination      DOE Library       Customized DOE

                        [FLOW CHART OMITTED]

Mask          BIM      6% AttPSM     CPL(TM)    BIM     6% AttPSM      CPL

              k1=0.4                    Layout Complexity           k1=0.3

OPC  Scattering Bars  Model OPC  CPL Mask Decomposition   DDL Mask Decomposition

ASML


Slide 27

Customized illumination (1)

o    NA = 0.8, 248 nm, BIM

o    CD = 120 nm x 740 nm, pitch = 230 nm x 920 nm

     [Graphic omitted]

ASML


Slide 28

Customized illumination (2)

o    NA = 0.8, 248 nm, BIM

o    CD = 120 nm x 740 nm, pitch = 230 nm x 920 nm



[Graphic omitted]


ASML


Slide 29

Impact of Phase Shift Mask (PSM)

   Binary          Binary                Alternating PSM  Chromeless PSM
   conventional    off axis              on axis          off Axis

                                [Graphic omitted]


ASML


Slide 30

CPL(TM)single exposure versus altPSM double exposure


                                    Phase Mask    +    Trim Mask

             AltPSM masks layouts  [Graphic omitted]  [Graphic omitted]
             (2 required)

Typical       [Graphic omitted]
Logic
Pattern

              CPL mask layout       [Graphic omitted]
              (only 1 needed)

ASML


Slide 31

100-nm SRAM imaging with CPL on an ASML PAS 5500TM/800

                                         Expose on ASML
                                          PAS 5500/800
[Graphic omitted]     [Graphic omitted]    with NA=0.80     [Graphic omitted]
          CPL algorithm                     QUASAR(TM)
                                          (sigma)in=0.57
                                          (sigma)out=0.87
Desired
SRAM
Pattern              Target CD of 100nm

ASML


Slide 32

Even small contacts can be made with CPL
ASML AT:1200, ArF, 0.85 NA, QUASAR illumination

  80-nm contacts,
  160-nm pitch
                       75-nm contacts,
   [Graphic omitted]            150-nm pitch
                                            K1 = 0.29
                          [Graphic omitted]       65-nm contacts,
                                           130-nm pitch

                                             [Graphic omitted]

ASML

Slide 33


Mask and system integration is needed to enable low K1

[Graphic omitted]                                        [Graphic omitted]
Aberrations                                       Scatter

                         [Graphic omitted]

                                                 [Graphic omitted]
                                                Illumination

                                           [Graphic omitted] Source
[Graphic omitted]                                            Optimization
   Dose
Optimization                  [Graphic omitted]
                        Mask optimization software

ASML


Slide 34

Mask and system integration is needed to enable low k1

o    Low k1 imaging reduces process windows and overlap of process windows when
     different features are imaged

o    DRAM manufacturing expected to reduce down to k1~0.30 using repetitive
     structures, strong phase shift masks, and customized illumination libraries

o    Logic manufacturing expected to reduce down to k1~0.36 using various
     structures, various phase shift masks, and various illumination modes

o    Mask tolerances, manufacturing (phase shift), and resolution (assist
     features) will continue to drive up mask costs going toward low k1
     manufacturing

o    ASML continues to optimize their systems for low k1 imaging, leading to
     further integration with customers by supplying tools that optimize
     mask/system settings for its customers' processes

ASML


Slide 35

Agenda

o    The shrink roadmap of our customers

o    Lithography shrink scenarios

     o    Wavelength reduction

     o    Aperture increase enabled by immersion

     o    Lowering the k1 factor

o    Special topics

     o    Immersion

     o    Maskless

o    Likely shrink scenarios

o    Conclusions

ASML


Slide 36

Why Immersion

dry      immersion      Convert existing lens to immersion

                        o    Resolution remains same
   [Graphic omitted]
                        o    Increased depth of focus

                        o    Larger process window => increased yield

                        o    Decrease double exposure layers, lower cost
                             per wafer

dry       immersion

                         Develop new NA>1 immersion lens
   [Graphic omitted]
                        o    Increased resolution

                        o    Delay wavelength transition


ASML


Slide 37

Dry versus wet focus sensing

                              Air                          Water
       [Graphic omitted]      Resist  [Graphic omitted]    Resist
                              Water                        Water

Process-induced focus shift  (nm)

[Graphic omitted]

Resist thickness (nm)

ASML


Slide 38

AT:1150i, 90-nm dense lines and spaces

[Graphic omitted]

ASML


Slide 39

Evaluation: immersion

o    Immersion most likely does not need infrastructural changes in materials,
     resist, mask, and pellicles

o    ASML can quickly adopt their equipment for immersion given the dual
     stage/dry metrology option and adaptable lens technology, giving an
     acceptable introduction risk

o    First full-speed scanning images achieved

o    Full process qualification in progress, however, defect-free immersion
     process qualification needs user assessment

o    At hyper-high NA, optics complexity and polarization effects will still be
     a challenge. Higher index fluids could help.

o    Existing planned product models can be adapted to immersion, increasing
     process margins (DOF) and allowing lower k1 values

ASML


Slide 40

Agenda

o    The shrink roadmap of our customers

o    Lithography shrink scenarios

     o    Wavelength reduction

     o    Aperture increase enabled by immersion

     o    Lowering the k1 factor

o    Special topics

     o    Immersion

     o    Maskless

o    Likely shrink scenarios

o    Conclusions

ASML


Slide 41

Spatial light modulator in maskless scanner

[Graphic omitted]                   [Graphic omitted]      Micronic SLM chip
                                        8 mm x 33 mm active area
                                          (512 x 2048 pixels)
                                             1.048 Mpixels


Lithography pattern generation          [Graphic omitted]
is controlled by reflecting
laser light rom individual pixels
towards or away from the wafer

ASML


Slide 42

How optical maskless helps to reduce time to market

Design Introduction                              Mask respin

                         [Graphic omitted]

Start  Design   Release   Mask making     Release    Mask Respin


                            > 18 months

         [Graphic omitted]

Start   Design   Release   Release

            < 12 months

ASML


Slide 43

Maskless practically eliminates fixed mask cost

Even at modest throughput OML is economical
                                            Maskless
                                            Scanner

                                               Mask
                                               Scanner

              Maskless more economical

Cost per Run

                  [Graphic omitted]

                1/Tput(mask) = 1/100


                                            With mask
Small Data      1/Tput(maskless) = 1/5-10   more economical
Prep Cost

                                Breakeven              #Wafers
                                #Wafers
                              100-500 Wafers

ASML


Slide 44

Evaluation:  maskless

o    Optical MaskLess (OML), unlike non-OML, uses the existing process and
     process simulation infrastructure

o    Productivity scaling is not limited by physics but by the evolution of data
     path improvements

o    Resolution scaling is compatible with mainstream mask based lithography,
     193 nm, immersion, etc.

o    OML could be built on an extension of proven ASML TWINSCAN technology and
     Micronic Sigma technology

o    Customer shipments could take place within 3 years

o    OML could be a solution for rising mask costs because of low k1 imaging,
     could enable a market for short wafer runs, and could reduce the time to
     market for our customers

ASML


Slide 45

Agenda

o    The shrink roadmap of our customers

o    Lithography shrink scenarios

     o    Wavelength reduction

     o    Aperture increase enabled by immersion

     o    Lowering the k1 factor

o    Special topics

     o    Immersion

     o    Maskless

o    Likely shrink scenarios

o    Conclusions

ASML


Slide 46

Technology choices: k1 values

                                       *Relaxed pitches required

                    Half pitch (nm)

         110      90      65      45      32      22
KrF     0.35    0.29
ArF             0.40    0.31
ArF-1                   0.44    0.30    0.22*
F2                      0.39    0.27*
F2-1                            0.37    0.26*
EUV                                     0.64    0.44

ASML


Slide 47

300-mm product roadmap and decision points

                  [Graphic omitted]

ASML


Slide 48

Conclusions (1)

o    For our customers, shrink continues to drive costs down and performance up.

o    High resolution capability challenges the costs of lithography, however,
     new technology such as macro aspheres, catadioptric designs, immersion, and
     field size reduction, in combination with productivity improvements, will
     limit the cost increase.

o    Wavelength reductions remain difficult and will continue to depend on new
     materials and processing. 193 nm is available now and will likely be
     extended by low k1 and immersion capability.

o    Low k1 lithography will drive further integration of the lithography
     supplier with its customer, driving design for manufacturing and low
     k1-friendly litho solutions.

ASML


Slide 49

Conclusions (2)

o    ASML's lens and dual-stage technology enables a quick and cost effective
     transition to immersion tools completely compatible with current dry tool
     metrology.

o    Immersion will likely become an 193-nm extension pushing 157 nm and EUV
     backwards. Qualified customer integration expected at the end of 2004.

o    Increased mask costs driven by low k1 lithography and the need for a short
     cycle time will drive a market in maskless technology.

o    Optical maskless is scalable in throughput and resolution and is
     transparent with existing mask-based lithography


Slide 50

ASML
Commitment

<PAGE>
                                                                   Exhibit 99.11

Slide 1

ASML logo

[Graphic omitted]

  The TWINSCAN Advantage

      or why 2 Stages
    are better than 1!

       Peter Jenkins
 VP WW Strategic Marketing
    13th September, 2003
  "RACE AHEAD WITH
  TWINSCAN


  THE WORLD"S ONLY
  DUAL-STAGE LITHOGRAPHY SYSTEM"


[Graphic omitted]


Slide 2

Safe Harbor


           "Safe Harbor" Statement under the U.S. Private Securities
              Litigation Reform Act of 1995: the matters discussed
                during this presentation include forward-looking
             statements that are subject to risks and uncertainties
              including, but not limited to, economic conditions,
              product and pricing, manufacturing efficiencies, new
               products development, ability to enforce patents,
            availability of raw materials and critical manufacturing
            equipment, trade environment, and other risks indicated
                      in filings with the U.S. Securities
                            and Exchange Commission.




Slide 3


    Presentation Outline


    >     Lithography Value Drivers
          for ASML Customers

    >     The TWINSCAN Advantage

             >>     TWINSCAN Overview &
                    XT:1250 Introduction

             >>     Productivity

             >>     Overlay

             >>     Imaging

    >     Summary




Slide 4


    Presentation Outline

  ---------------------------------------
    >     LITHOGRAPHY VALUE DRIVERS
          FOR ASML CUSTOMERS
  ---------------------------------------
    >     The TWINSCAN Advantage

             >>     TWINSCAN Overview &
                    XT:1250 Introduction

             >>     Productivity

             >>     Overlay

             >>     Imaging

    >     Summary




Slide 5


<TABLE>
<CAPTION>


IC VALUE DRIVERS


<S>               <C>        <C>         <C>              <C>          <C>            <C>
        ----------------------------------------------------------------------------------------
       |                                                                                         |
       |                                ----------                                               |
       |     ( xx  x )     (    x )    |          |      --------     --------      --------     |
       |     (  xx x }---> (      }    |  DRAM    |---> |  DRAM  |   |  CPU   |--->|  CPU   |    |
       |     ( xx   x)     ( x    )    |  256Mb   |     |  256Mb |   |  2GHz  |    |  4GHz  |    |
       |                                ----------       --------     --------      --------     |
       |                                                                                         |
       |             Yield:                       Shrink:                 Functionality:         |
       |     More Good Die per Wafer         More Die per Wafer      More Transistors per Die    |
       |                                                                                         |
       |                                                                                         |
       |                                                                                         |
       |         Yield                                                                           |
Revenue|        Shrink                                                                           |
Per    |     Functionality                                                      (      )         |
Wafer  |      Wafer Size                                             ( 200}---> (300 mm          |
       |                                                             ( mm )     (      )         |
       |                                                                                         |
       |                                                                 Wafer Size:             |
       |                                                                Lower Cost Die           |
       |                                                                                         |
       |                                                                                         |
       |                                                                                         |
       |                              [Graphic omitted]                                          |
       |                                                                                         |
       |                                                                                         |
       | Leading Edge Products                                   Commodity Products              |
        ----------------------------------------------------------------------------------------
                                                   Time



</TABLE>


Slide 6


<TABLE>
                                     ------------------
                                    |                  |
Lithography design rule enabler =   | k1 x lambda / NA |
                                     ------------------

<S>                <C>                                    <C>
                 ----------------------------------------------
                |  Reduction in Design Rules has been enabled  |
                |     through scaling of 3 basic parameters    |
                 ----------------------------------------------
 1   |----------------------------------               ---------------------------------
     |                                  |              |                                |
0.9  |                                  |              |                                |
     |                                  |              |                                |
0.8  |                                  |         0.95 |                                |
     |                                  |              |                                |
0.7  | (lambda) transition              |         0.85 |                ~0.03 Reduction |
     |    ~ every 6                     |              |                 in k1 per Year |
0.6  |       years                      |         0.75 |                                |
     |                                  |              |                                |
0.5  |         [Graphic                 |         0.65 |      [Graphic                  |
     |           Omitted]       ~ 0.03  |              |        Omitted]                |
0.4  |                        increase  |         0.55 |                                |
     |                        in NA per |              |                                |
0.3  |                          year    |         0.45 |                                |
     |                                  |              |                                |
0.2  |                                  |         0.35 |                                |
     |                                  |              |                                |
0.1  ------------------------------------         0.25  ---------------------------------
     1982 1986 1990 1994 1998 2002  2006                 1982 1986 1990 1994 1998 2002 2006

         First Year of Tool Shipment                         First Year of Tool Shipment



Source: ASML

</TABLE>

Slide 7


LITHOGRAPHY DETERMINES DIMENSIONS AND LAYER-TO-LAYER
LATERAL POSITIONING ACCURACY (OVERLAY)




                                   [Graphic omitted]



Source:ICE



Slide 8

LITHOGRAPHIC PERFORMANCE PARAMETERS
Critical Dimension & Overlay




Lithography Critical Dimension & Overlay Performance Determines:

>>     Transistor Speed    ------>  Chip Performance (speed)

>>     Circuit Functioning ------>   Die yield

>>     Design Rules  -------> Chip Size  ------->  Number of Chips on a wafer




                                          Overlay
                   [Graphic omitted]     Tolerance

   Critical
Dimension(CD)


                                                 [Graphic omitted] Top Down View





Slide 9


   ROOM TO SHRINK
   Sources of CD Non-Uniformity

                                                               [Graphic omitted]
                                                                 Resist coating
 Exposure Tool
[Graphic omitted]

                                [Graphic omitted]
                                                               [Graphic omitted]
                                                                Devlop & Bake

 Reticle
[Graphic omitted]
                                                               Etch
                                                   [Graphic omitted]



Slide 10


CRITICAL DIMENSION RELATIONSHIP TO FOCUS & energy

        Focus and Exposure Energy are prime drivers for CD & Image Fidelity


[Graphic omitted]
                   ==================================================
                   |                                 Energy -15%     |
               +20%|_________________________________________________|
Critical           |                                 Energy -10%     |
Dimension      +10%|-------------------------------------------------|_
                   |                                                 | |
            Nominal|_________[Graphic omitted]____ Best Energy_______| |Target
              CD   |                                                 | |CD Range
                   |                                                 | |
              -10% |-------------------------------------------------|_
                   |                                 Energy +10%     |[Graphic
              -20% |_________________________________________________|omitted]
                   |                                 Energy +15%     |
                    ==================================================
                   -0.4  -0.3  -0.2  -0.1  0  +0.1  +0.2  +0.3  +0.4

                     [Graphic             [Graphic     Focus [(mu)m]
                     omitted]              omitted]




Slide 11


ROOM TO SHRINK

Smaller process windows make system performance even more
critical for die yield and to avoid rework

                     +   -----------------------------------------------
                        |                                               |
                        |                                               |
                        |                                               |
                        |                    [Graphic                   |
                        |                    omitted]                   |
Exposure                |                                               |
energy       Nominal    |                                               |
                        |                                               |
                        |                                               |
                        |  Focus & Energy                  System       |
                        |  Window for +/-10%              Control &     |
                        |  CD Control                     Stability     |
                        |                                               |
                     -   -----------------------------------------------
                          -                   Nominal                   +
                                               Focus




Slide 12


THE CHALLENGE OF SHRINKING PROCESS WINDOWS

           -------------------------------------------------------------
          |      Smaller process windows make system performance        |
          |   even more critical for die yield and to avoid rework      |
           -------------------------------------------------------------


                 ===================================================
            12  |________110nm______________________________________|
                |                                                   |
             9  |___________________________________________________|
                |                                                   |
             6  |_______________90mm________________________________|
                |                                                   |
Exposure     3  |________________[Graphic omitted]__________________|
energy          |                                                   |
[%]          0  |________________________70nm_______________________|
                |                                                   |
            -3  |___________________________________________________|
                |                                                   |
            -6  |___________________________________________________|
                |                                                   |
            -9  |___________________________________________________|
                |                                                   |
            -12  ====================================================
                -0.6  -0.45  -0.3  -0.15  0  +0.15  +0.3  +0.45  +0.6

                                      Focus [(mu)m]




Slide 13


LITHOGRAPHY PERFORMANCE RELATIONSHIP TO DIE YIELD

             Overlay & Imaging Performance is Critical for Realizing
                    Maximum Yield and Shrinking Design Rules


          100  ====================================================
              |      |     110nm   |      |      |     |     |     |
              |      |      |      |      |      |     |     |     |
          80  |______|______|______|_90nm_|______|_____|_____|_____|
              |      |      |      |      |     70nm   |     |     |
              | Design Rule |      |      |      |     |     |     |
          60  |___Shrink____|______|______|______|_____|_____|_____|
              |      |      |      |      |      |     |     |     |
Die           |      |      |   [Graphic omitted]|     |     |     |
Yield     40  |______|______|______|______|______|_____|_____|_____|
              |      |      |      |      |      |     |     |     |
              |      |      |      |      |      |     |     |     |
          20  |______|______|______|______|______|__Design Rule____|
              |      |      |      |      |      |  Limited Yield  |
              |      |      |      |      |      |     |     |     |
              |      |      |      |      |      |     |     |     |
           0   ====================================================
              35     27     20     15     10     7     5     3    0
                       Overlay & CD Uniformity Control




Slide 14


THE VALUE OF LITHOGRAPHY PERFORMANCE
Overlay impact on yield at current technology

                              110 nm Memory Example

                                 _____________
Product Overlay Distribution    | 5nm Overlay  \    Product Overlay Distribution
before Overlay Improvement      | Improvement  /     after Overlay Improvement
                                 -------------

 --------------------------------           --------------------------------
|                   |Design Rule |         |                   |Design Rule |
|                   |Spec Limit  |         |                   |Spec Limit  |
|                   |            |         |                   |            |
|                   |            |         |                   |            |
|                   |Rework &    |         |                   |            |
|                   |Yield Loss  |         |                   |            |
|  [Graphic         |            |         |   [Graphic        |            |
|   Omitted]        |            |         |    Omitted]       |            |
|                   |            |         |                   |            |
 --------------------------------           --------------------------------
        Overlay(nm)        _______________________   Overlay(nm)
                         | 1.15% Yield Improvement \
                         |  plus Reduced Rework    /
                           -----------------------


              5nm overlay improvement = >$1 million revenue / month

            30k wafers / month x 501 die/wafer x 1% x $6.50 (die ASP)


Slide 15


  LITHOGRAPHY VALUE DRIVERS : DIE PERFORMANCE YIELD


     Critical Dimension Targeting & Uniformity Determine Device Performance.
         Lithography is the Prime Driver for Critical Dimension Control.

                             ____________________
   IC Speed Distribution    |Improved CD Control \   IC Speed Distribution
                            |                    /
                             -------------------
 --------------------------------           --------------------------------
|                   |            |         |                   |            |
|                   |            |         |                   |            |
|                   |            |         |                   |            |
|                   |            |         |                   |            |
|                   |[Graphic    |         |                   |            |
|                   | Omitted]   |         |                   |            |
|  [Graphic         |            |         |   [Graphic        |            |
|   Omitted]        |            |         |    Omitted]       |            |
|                   |            |         |                   |            |
 --------------------------------           --------------------------------
   +      Speed (Mhz)          -             +        Speed (Mhz)         -

                          ----------------------------
                         | More die at higher speed($) \
                         |                             /
                          ----------------------------


Slide 16


THE VALUE OF LITHOGRAPHY PERFORMANCE
CDU impact on yield at current technology



                             _________________
       CD Distribution      | 1nm CD Uniformity \        CD Distribution
     before improvement     |   Improvement     /      after improvement
                             -----------------

 -----------------------------------        ---------------------------------
|       |                  |        |      |       |                |        |
| Spec  |                  | Spec   |      | Spec  |                | Spec   |
| Limit |                  | Limit  |      | Limit |                | Limit  |
|       |                  |        |      |       |                |        |
|       |                  |        |      |       |                |        |
|       |                  |        |      |       |                |        |
|       | [Graphic         |        |      |       | [Graphic       |        |
|       |  Omitted]        |        |      |       |  Omitted]      |        |
|       |                  |        |      |       |                |        |
 -----------------------------------        ---------------------------------
            CD (nm)                                    CD (nm)

           Rework &                         Increased Yield & Reduced Rework
          Yield Loss


               1nm CDU improvement = > $3 million revenue / month
          30k 300-mm wafers / month x 635 die (10 mm x10 mm) x 1% x $16


Slide 17


   Presentation Outline


    >     Lithography Value Drivers
          for ASML Customers
   -----------------------------------------------
    >     The TWINSCAN Advantage

             >>     TWINSCAN Overview &
                    XT:1250 Introduction

             >>     Productivity

             >>     Overlay

             >>     Imaging
   -----------------------------------------------
    >     Summary



Slide 18


300mm transition

Ratio of 300 mm to Total Semiconductor Equipment Cap Ex


      -----------------------[Graphic omitted]------------------------------
80%  |                                                                      |
     |                                                                      |
70%  |----------------------------------------------------------------------|
     |                                           Mainstream                 |
60%  |----------------------------------------------------------------------|
     |                                                                      |
50%  |----------------------------------------------------------------------|
     |                                                                      |
40%  |-----------------------Ramp-------------------------------------------|
     |                                                                      |
30%  |----------------------------------------------------------------------|
     |                                                                      |
20%  |----------------------------------------------------------------------|
     |     Pilot                                                            |
10%  |----------------------------------------------------------------------|
     |                                                                      |
 0%  |____|___ |____|_________|____|____|____|___|_____|____|___|____|_____||
      1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010


Source: ASML, Dataquest
March 2003



Slide 19


 TWINSCAN(TM) installed base




                              [MAP Graphic omitted]

            North America               Europe                   Asia
                46                        12                      50




                              ----------------------------------------------
                             |  108 TWINSCANS Installed as of October 2003  |
                              ----------------------------------------------
[Graphic omitted]



Slide 20


ASML TWINSCAN
Enabling platform for 300 mm & 50 nm lithography




                                     -------------------------------
                                    |  Improved vibration control   |
                                    | Balance mass stage technology |
 ----------------------              -------------/-----------------
|   Sub 50 nm design   |                         /
|  highly stable body  |                        /
 --------------\------_                        <
                \                                         -------------------
                 \           [Graphic            <------ |   Improved focus  |
                  >            omitted]                  |  z-interferometry |
                                                          -------------------



Slide 21


ASML TWINSCAN dual wafer stage
Enabling technology for 300 mm productivity

                  *New*
                    -------------------------
                   |  Improved Metrology     |
                   | Dual wafer stages       |
                    -------------/-----------
                                /
                               /
                             <
                          [Graphic
                           omitted]           ------------------------
                   >                 <------ | Increased Productivity |
                  /                          |  Dual wafer stages     |
*New*            /                            ------------------------
 ---------------/----------
| Improved Focus          |
| Off-axis wafer mapping  |
 -------------------------



Slide 22



Twinscan dual stage parallel processing


                                                [Graphic
    Metrology                                    omitted]
     Station                                                 Expose
                                                             Station
        [Graphic
         omitted]



Slide 23


"Life of a wafer" on dual wafer stages


 --------------------------------                ----------------------------
|    Measurement Position        |             |        Expose Position      |
|                                |             |                             |
|                                |             |                             |
|                                |             |                             |
|                     Map        |             |     [Graphic                |
|                     Wafer      |             |      Omitted]               |
|         Align                  |             |                             |
|         Wafer                  |   Stage     |                  [Graphic   |
|                                |   Swap      |                   Omitted]  |
| Load                           |             |                             |
| Wafer                          |             |                             |
|                                |             |                             |
|                                |             |                    Expose   |
|                                |             |                    Wafer    |
|      Unload                    |             |  Align                      |
|      Wafer                     |             | Reticle                     |
|                                |             |                             |
|                                |             |                             |
 --------------------------------                ----------------------------




Slide 24


   Presentation Outline


    >     Lithography Value Drivers
          for ASML Customers

    >     The TWINSCAN Advantage

             >>     TWINSCAN Overview &
                    XT:1250 Introduction

             >>     Productivity

             >>     Overlay

             >>     Imaging

    >     Summary



Slide 25


TWINSCAN(TM) XT:1250

Extending TWINSCAN & ArF to the 65 nm Node                -----------------
                                                         |       ArF       |
                                                         |  >100 Shipments |
                                                          -----------------
[Graphic Omitted]
PAS 5500/900      [Graphic Omitted]
Q1-1999           PAS 5500/1100        [Graphic Omitted]
                      Q2-2001          PAS 5500/1150
                                           Q2-2003

                                                  [Graphic Omitted]
                                                  TWINSCAN AT:1100B
                                                     Q4-2001
   --------------------------------------
  | [Graphic Omitted]  TWINSCAN XT:1250  |                   [Graphic Omitted]
  |                      NEW Q2-2004     |                   TWINSCAN AT:1200B
  |                                      |                        Q2-2003
  ---------------------------------------
                                                            [Graphic Omitted]
                                                            TWINSCAN AT:850
                                                                Q4-2001

                                               [Graphic Omitted]
                                               TWINSCAN AT:400
                                                   Q4-2001
                              [Graphic Omitted]
                              TWINSCAN AT:750
                                  Q3-2001
     [Graphic Omitted]
     TWINSCAN AT:750S
        Q3-2000
                                                             -----------------
                                                            |  TWINSCAN(TM)   |
                                                            |  >100 Shipments |
                                                             -----------------




Slide 26


XT:1250 imaging results: Dense lines*


 70 nm (BIM)

[Graphic      [Graphic    [Graphic   [Graphic  [Graphic    [Graphic    [Graphic
omitted]      omitted]    omitted]    omitted]  omitted]   omitted]     omitted]

- -0.15(mu)m   -0.10(mu)m  -0.05(mu)m   0.00    +0.05(mu)m  +0.10(mu)m  +0.15(mu)m

140-nm pitch through focus. Binary mask. 70-nm lines: dipole NA=0.85,
sigma 0.93/0.69.
TArF6111, Ft=175 nm on Arc28



65 nm (AttPSM)

[Graphic           Design on mask: 65-nm 1:1 pitch
omitted]           6% AttPSM
                   Dipole 35X illumination setting
                   NA=0.85, sigma 0.93/0.69
                   TArF6111, Ft=175 nm on Arc28


*Data acquired using an AT:1200B




Slide 27



XT:1250 imaging results: Dense contact holes*

85 nm (AttPSM)

[Graphic      [Graphic     [Graphic        170-nm pitch
omitted]      omitted]     omitted]        6% AttPSM
                                           NA=0.85, sigma 0.93/0.69 QUASARTM-30
- -0.2(mu)m     nominal      +0.2(mu)m       Process: 250-nm TArF 7047, 82-nm AR19






80 nm (CPL**)          75 nm (CPL)                65 nm (CPL)

[Graphic               [Graphic                   [Graphic
omitted]                omitted]                   omitted]


*Data acquired using an AT:1200B
**Reticle CPL(TM) technology from ASML MaskTools




Slide 28



AT:1200 to XT:1250 evolution
                                                 ---------------
                         -------------          |   Starlith    |     [Graphic
    [Graphic            |   AT:1200B  |         |   1250 Lens   |     omitted]
     omitted]           |     80 nm   |         |       +       |
                         -------------          |   Ultra-k1    |
                               |                |    Package    |
                               |          +     |               |
                               |                |   QUASAR XL   |
                              \ /               |  LithoGuide   |
     [Graphic            -------------          |  Dose Mapper  |
      omitted]          |   XT:1250   |         |    CD-FEC     |
                        |    70 nm    |         |    TOP-II     |
                         -------------          |   ATHENA-SB   |
                            /          \        | & much more!  |
                           /            \       |               |
                          /              \       ---------------
                         /                \
                       +                   +
 [Graphic      -------------     Field       -------------       [Graphic
  omitted]    |  XT:1250B   |-------------> |  XT:1250B   |       omitted]
150 WPH       |   200 nm    |Upgradeable    |   200 nm    |        114 WPH
58 exp 30 mJ   -------------                 -------------     125 exp 30 mJ





Slide 29



AT:1200 to XT:1250 value enhancements

                      [Graphic            [Graphic             [Graphic
                       omitted]            omitted]             omitted]
                      ----------          ----------            ----------
                     | AT:1200B |        | XT:1200B |          | XT:1250D |
                      ----------          ----------            ---------

Resolution             80 nm            70 nm (87.5%)         70 nm (87.5%)

Overlay                12 nm             8 nm (66%)            8 nm (66%)

Throughput

8" (58 shots)          145 WPH         150 WPH (103%)

12" (125 shots)        83 WPH                                  114 WPH (137%)

Reticle Ex.            30 sec           10 sec (33%)            10 sec (33%)

Lot O/H                40 sec           10 sec (25%)            10 sec (25%)

Footprint              24.1m[2]         18.5m2 (75%)                 <-

Facilities              100%                <70%                     <-



Slide 30



ROOM TO SHRINK
Ultra-k1 portfolio



                              Customized Illumination
                                   *   QUASAR & AERIAL Illumination
                                   o   LumenShaper Customized Illumination
[Graphic omitted]
                              Mask Design Optimization
*  XT standard                     o   LithoCruiser Scanner & Mask Optimization
o  Optional                        o   MaskWeaver: OPC implementation
                                   o   CPL: Chromeless Phase Lithography
                                   o   DDL: Double Dipole Lithography

                              Aberration Measurement & Control
                                   *   ILIAS: Full-field interferometry data
                                   *   SAMOS: Stray light measurement
                                   *   Pupil Monitor
                                   *   LithoGuide: Integrated Measurement

                              Process Variability Compensation
                                   *   Extended exposure
                                   *   DoseMapper: Intrafield dose correction




Slide 31




Fab friendly
Smallest High NA 193-nm yellow room footprint



                                     *   _____________________________
     AT:1200B                        |  |                             |
[Graphic omitted]                    |  |  -------------------------------->
                                4.02m|  | |       AT:1200               Track>
  2.02m deep                         |  | |                                  >
  5.2m  wide                         |  |  --------------------------------->
  3.1m  high                         |  |                             |
                                     *   _____________________________
                                        *---------- 6.2m ------------*




     XT:1250                            *   _____________________________
[Graphic omitted]                       |  |                             |
                                        |  |  -------------------------------->
  2.02m deep                       4.02m|  | |       XT:1250             Track>
  4.5m  wide                            |  | |                                >
  2.89m high                            |  |  ------------------------------->
                                        |  |                             |
                                        *   _____________________________
                                           *---------- 4.6m ------------*




Slide 32



Fab friendly
Reduction of specified facility requirements




Precentage of original AT:1200B requirements              XT:1250B      XT:1250D
- --------------------------------------------------------------------------------

Power consumption (kVA@400Vac, excl laser)                   54%          68%

Process cooling water heat load (water cooled Ecabs)         43%          33%

Process cooling water heat flow                              54%          54%

Minimum clean dry air pressure                               12%          12%

Clean dry air flow                                           35%          35%

Exhaust flow XT unit (incl water cooled Ecabs)               31%          31%

Exhaust heat load XT exposure unit                           67%          67%


Slide 33




TWINSCAN value of ownership

                                  Productivity
                                       /\
                                      /   \
                                     /     \
                                    /       \
                                   /         \
                                  /           \
                                 /   Yield     \
                                /               \
                               /                 \
                              ---------------------
        Imaging                                          Overlay


     -------------------------------------------------------------------
   |                      Maximum Good Die per Day                       |
   |                       & Greater Extendibility                       |
     -------------------------------------------------------------------


Slide 34



TWINSCAN value of ownership

                                  PRODUCTIVITY
                                       /\
                                      /   \
                                     /     \
                                    /       \
                                   /         \
                                  /           \
                                 /   Yield     \
                                /               \
                               /                 \
                              ---------------------
        Imaging                                          Overlay


     -------------------------------------------------------------------
   |                      Maximum Good Die per Day                       |
   |                       & Greater Extendibility                       |
     -------------------------------------------------------------------


Slide 35

<TABLE>

How many exposures on a 300-mm wafer?

    ASML test condition represents average production condition


<S>            <C> <C>   <C>   <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C>
               ------------------------------------------------------------------------------------
         220  |                                                                                    |
              |                                                                                    |
         200  |------------------------------------------------------------------------------------|
              |                                                                                    |
Exposure 180  |------------------------------------------------------------------------------------|
Shots/        |                                                                                    |
300-mm   160  |------------------------------------------------------------------------------------|
Wafer*        |                              [Graphic omitted]                                     |
         140  |-125 shots--------------------------------------------------------------ASML-Spec---|
              |=================================================================================== |
         120  |------------------------------------------------------------------------------------|
              |                                                                                    |
         100  |------------------------------------------------------------------------------------|
              |                                                                                    |
          80  |------------------------------------------------------------------------------------|
              |                                                                                    |
          60  |____________________________________________________________________________________|
               5   6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26
               x   x  x  x  x  x   x   x   x   x   x   x   x   x   x   x   x   x   x   x   x   x
               5   6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26

                                               DIE SIZE [mm]


* 3mm wafer edge exclusion, minimum 1 complete die within exclusion


</TABLE>

Slide 36


WHICH SCANNER HAS THE HIGHEST THROUGHPUT?

        Some companies' throughput claims are only telling half the story!


          ASML Condition                               ASML Throughput Test

         [Grahic omitted]                                 [Grahic omitted]

                 ------------
Alignment  =    | 4 Point AGA |  16 Point           Alignment =   16 Point
Field Size =    | 26 x 33 mm  |  16 x 33 mm         Field Size =   16 x 32 mm
Exposure Shots =| 64          |  125                Exposure Shots = 125
Throughput =    | 140 WPH     |  >80 WPH            Throughput =     >112 WPH
                 ------------    ---------
                 [text struck
                     out]


Slide 37

<TABLE>


   300MM PRODUCTIVITY CHALLENGE FOR LITHOGRAPHY

<S>               <C>       <C>     <C>       <C>          <C>        <C>           <C>
                 ------------------------------------------------------------------------------
                |                                                                  ^           |
                |                                   2.23 x # of Exposures         / ______     |
               -|                  [Graphic Omitted]                  ___________/ |      |    |
                | 16mm x 16mm                            Scan Speed  / ______      |      |    |
           100  |--Die Example--------------------------------------/-|------|-----|------|----|
                |[Graphic Omitted]                      ___________/  |      |     |      |    |
            90  |--8"/58 Shots-------------------------/--------------|------|-----|------|----|
                |    ______                           /     ______    |      |     |      |    |
            80  |---|------|------------------- _____/-----|------|---|------|-----|------|----|
                |   |      |   12"/125 Shots   |      |    |      |   |      |     |      |    |
            70  |---|------|-----35% Loss------|------|----|------|---|------|-----|------|----|
                |   |      |--->  Dual   ----> |      |    |      |   |      |     |      |    |
            60  |---|------|------Stage--------|------|----|------|---|------|-----|------|----|
Throughput      |   |      |      _______      |      |    |      |   |      |     |      |    |
 [WPH]      50  |---|------|-----|-------|-----|------|----|------|---|------|-----|------|----|
                |   |      |     |       |     |      |    |      |   |      |     |      |    |
            40  |---|------|-----|-------|-----|------|----|------|---|------|-----|------|----|
                |   |      |     |       |     |      |    |      |   |      |     |      |    |
            30  |---|------|-----|-------|-----|------|----|------|---|------|-----|------|----|
                |   |      |     |       |     |      |    |      |   |      |     |      |    |
            20  |---|------|-----|-------|-----|------|----|------|---|------|-----|------|----|
                |   |      |     |       |     |      |    |      |   |      |     |      |    |
            10  |---|------|-----|-------|-----|------|----|------|---|------|-----|------|----|
                |   |      |     |       |     |      |    |      |   |      |     |      |    |
             0  |___|______|_____|_______|_____|______|____|______|___|______|_____|______|____|
                Single Stage    Single Stage    TWINSCAN   TWINSCAN    TWINSCAN     TWINSCAN
                 250 mm/s        250 mm/s       250 mm/s   320 mm/s    360 mm/s
                  2000            2000            2001       2002        2003



</TABLE>

Slide 38

<TABLE>


Step & Scan timing explained


<S>          <C>     <C>    <C>    <C>    <C>    <C>     <C>    <C>    <C>     <C>    <C>

         600  |--------------------------------------------------------------------------
              |            Scanning                                                      |
 Scan         |     | <--- Exposure -----> |                                             |
 Speed   500  |   ------------------------------         ---------------------------     |
              |  |                               |     |                             |   |
 [mm/         |  |                               |     |          Repeat             |   |
 sec]    400  |  |                               |     |                             |   |
              |  |                               |     |                             |   |
              |  |                               |     |                             |   |
         300  |  |                               |     |                             |   |
              |  |                               |     |                             |   |
              |  |                               |     |                             |   |
         200  |  |                               |     |                             |   |
              |  |                               |     |                             |   |
              |  |                               |     |         Esposure #2         |   |
         100  |  |                               |     |                             |   |
              |  |                               |     |                             |   |
              |  |                               |     |                             |   |
           0  |_________________________________________________________________________ |
             0.000   0.040  0.080  0.120  0.160  0.200   0.240  0.280  0.320   0.360  0.400

                                                                                Time [sec]



</TABLE>


Slide 39

<TABLE>


Actual Step & Scan times


<S>          <C>     <C>    <C>    <C>    <C>    <C>     <C>    <C>    <C>     <C>    <C>

         600  |--------------------------------------------------------------------------
              |                                                                          |
 Scan         |                                                                          |
 Speed   500  |                                                                          |
              |                                                                          |
 [mm/         |                                                                          |
 sec]    400  |                                                                          |
              |                                                                          |
              |                      [GraphicS omitted]                                  |
         300  |                                                                          |
              |                                                                          |
              |                                                                          |
         200  |                                                                          |
              |                                                                          |
              |                                                                          |
         100  |                                                                          |
              |                                                                          |
              |                                                                          |
           0  |_________________________________________________________________________ |
             0.000   0.040  0.080  0.120  0.160  0.200   0.240  0.280  0.320   0.360  0.400

  AT 2002     |-----------------------------------------------------|           Time [sec]
              |-----------------------------------------------------|
  AT 2003     |---------------------------------------------|
              |---------------------------------------------|
  N-2003      |------------------------------------------------------|
              |------------------------------------------------------|
  C-2003      |----------------------------------------------------|
              |----------------------------------------------------|
  XT 2004     |-----------------------------------------|
              |-----------------------------------------|
  XT 2005     |--------------------------------------|
              |--------------------------------------|


</TABLE>

Slide 40

<TABLE>

<S>                                                               <C>
TOTAL WAFER PROCESS TIME                                         Field size: 16 x 32 mm
                                                                 125 Exposures / Wafer
    Wafer Processing Time =                                      Scan Speed Limited
    Overhead Time + # Shots x Step & Scan Time                   16 points alignment

             0s                                                            45s
             |                                                              |  [Graphic    300 mm
             |                                                              |  Omitted]
             | Swap+Global+Fine Align     Step Time         Scan Time       |
             |-------------------------\-------------\--------------------\ |
Competition  |                    16s   >        16s  >            10s     >|   < 45 Seconds
Single Stage |                         /             /                    / |    >  80 wph
 500 mm/sec  |------------------------------------------------------------  |
             |                                                              |   |----------|
             |                                        Focus & Level Time    |   |----------|
             |                                          ----------------- \ |   |----------|
             |                                                      13s    >|   |  + 40%   |
             |                                                            / |   |   WPH    |
             |                                          -----------------   |  _|          |_
             |                                                              |   \          /
             |                                                                   \        /
             |                                                                    \      /
             |   Metrology Operation                                               \    /
             |  Global+Wafer Map+Fine Align                                           *
             |--------------------------\                                       < 32 Seconds
 Twinscan    |                           >                                      >  112 wph
Dual Stage   |                          /
  2003       |-------\------------\---------------
             |    7s  >       15s  >           10s \
             |       /            /                /
             |------------------------------------
             | Swap    Step Time     Expose Time
             |
             | Wafer Exposure Operation
             |

                     Dual Stage Technology Delivers More Wafers per Hour



</TABLE>

Slide 41

<TABLE>


THE POWER OF TWO
Greater throughput across range of die sizes


<S>            <C> <C>   <C>   <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C> <C>
               ------------------------------------------------------------------------------------
         150  |                                                                                    | 8 or 16
              |                                                                                    | Pairs
         140  |                                                           Dual Stage               |
              |                                                                                    |
         130  |                                                                                    |
              |                                                                                    |
         120  |                                                                                    |
              |------------------------------------------------------------------------------------|
300 mm   110  |                                                                                    |
Through-      |                              [Graphic omitted]                                     |
put      100  |                                                                                    |
[WPH]         |                                                                                    |
          90  |------------------------------------------------------------------------------------| 8 Pairs
              |                                                                                    |
          80  |------------------------------------------------------------------------------------| 16 Pairs
              |                                                                                    |
          70  |                                                                                    |
              |                                                                Single Stage        |
          60  |____________________________________________________________________________________|
               5   6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26
               x   x  x  x  x  x   x   x   x   x   x   x   x   x   x   x   x   x   x   x   x   x
               5   6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26

                                               DIE SIZE [mm]


</TABLE>

Slide 42


90nm DRAM case study

   ----------            ---------------         ----------------------------
  | Die Size |          | 4 Die / Field |       | # Potential Good Die = 501 |
   ----------            ---------------         ----------------------------

        9.3 mm                     18.6
        |<------>|               |<------>|
                                                               # Exposure
  _____  --------          _____  --------
  ^     |        |         ^     |        |               Fields = 146
  |     |        |         |     |        |
13.3    |        |       126.6   |        |
  |     |        |         |     |        |
  |     |        |         |     |        |
  *____  --------          *____  --------


        -----------------------------                --------------------------
        Total = 23 Lithography Layers                # Exposures / Wafer = 146
        -----------------------------                --------------------------

 --------------------------    -----------------------   ---------------------
|   12x I-line Layers      |  |    5x KrF Layers      | |    6 ArF Layers     |
| 146 shots @ 150 mJ/cm2   |  | 146 shots @ 40 mJ/cm2 | |146 shots @ 38 mJ/cm2|
|  Minimum 4 pt Align      |  |  Minimum 8 pt Align   | | Minimum 8 pt Align  |
|Conventional Illumination |  | Annular Illumination  | |Annular Illumination |
 --------------------------    -----------------------   ---------------------






Slide 43
<TABLE>

<S>     <C>    <C>                                            <C>

Productivity analysis                                                            X  Peak WPH
               _____________________________________________                     *  Batch WPH
         130  |                                             |  2600              ^  Wafers/Day
              |                                             |
         120  |                                             |  2400
              |                                             |
         110  |   ___X____                                  |  2200
              |  |                                          |
         100  |  | 109   |                                  |  2000
              |  |       |___*___                           |                   -----------------------
          90  |  |       |  89   |       ___X____           |  1800            | 142 shots @ 40 mJ/cm2 |
              |  |     _____     |      |  81   |           |                  |  Minimum 8 pt Align   |
          80  |  |    |  |   |   |      |       |           |  1600            | Annular Illumination  |
              |  |    |  |   |   |      |       |           |                   -----------------------
          70  |  |    |  |   |   |      |       |____*__    |  1400
              |  |    |  ^   |   |      |      _|___ 67 |   |
          60  |  |    |1627  |   |      |     |  ^  |   |   |  1200    Wafers
Wafers        |  |    |  |   |   |      |     |1219 |   |   |          Per
per       50  |  |    |  |   |   |      |     |  |  |   |   |  1000    Day
Hour          |  |    |  |   |   |      |     |  |  |   |   |
          40  |  |    |  |   |   |      |     |  |  |   |   |  800
              |  |    |  |   |   |      |     |  |  |   |   |
          30  |  |    |  |   |   |      |     |  |  |   |   |  600
              |  |    |  |   |   |      |     |  |  |   |   |
          20  |  |    |  |   |   |      |     |  |  |   |   |  400
              |  |    |  |   |   |      |     |  |  |   |   |
          10  |  |    |  |   |   |      |     |  |  |   |   |  200
              |  |    |  |   |   |      |     |  |  |   |   |
           0  |__|____|__|___|___|______|_____|__|__|___|___|  0
                        ASML               Competition




</TABLE>

Slide 44


<TABLE>


 300mm fab ramp-up

<S>                    <C>                                        <C>
                       ASML                                       Competition
           --------------------------------       ---------------------------------
Phase 1   | ArF   KrF    I-Line    I-Line  |     | ArF     KrF    I-Line    I-Line |
          | ArF   KrF    I-Line    I-Line  |     | ArF     KrF    I-Line    I-Line |
A = 12    | ArF   KrF    I-Line    I-Line  |     | ArF     KrF    I-Line    I-Line |
C = 19    |================================|     | ArF     KrF    I-Line    I-Line |
          | ArF   KrF    I-Line    I-Line  |     |=================================|
          | ArF   KrF    I-Line    I-Line  |     | ArF     KrF    I-Line    I-Line |
          |      =====                     |     | ArF     KrF    I-Line    I-Line |
Phase 2   | ArF | KrF |  I-Line    I-Line  |     | ArF     KrF    I-Line    I-Line |
          |=====       ====================|     |      =======                    |
          | ArF          I-Line    I-Line  |     | ArF |   KrF  | I-Line    I-Line |
A = 23    |              I-Line    I-Line  |     | ====         |                  |
C = 36    |              I-Line    I-Line  |     | ArF     KrF  | I-Line    I-Line |
          |                                |     | ArF          | I-Line    I-Line |
          |   ___________________________  |     |              |=========         |
Phase 3   | |   More Room for Additional | |     | ArF    I-Line  I-Line  | I-Line |
          | |     Capacity Expansion     | |     |                         ========|
A = 29    |   ___________________________  |     | I-Line I-Line  I-Line    I-Line |
C = 47    |                                |     |                                 |
           --------------------------------       --------------------------------



</TABLE>


Slide 45
<TABLE>


Lithocell capital investment
                                                                                   Phase 3


<S>       <C>      <C>                         <C>                      <C>
                    -------------------------------------------------------------------------
                   |                     |                        |     Saving = $72.3M     |
           500,000 |-- X  I-Line --------|------------------------|-------------------------|
                   |   *  KrF            |                        |              -----      |
           450,000 |-- ^  ArF -----------|------------------------|-------------|     |-----|
                   |                     |      Phase 2           |             |     |     |
           400,000 |---------------------|------------------------|-------------|     |-----|
                   |                     |   Saving  = $65M       |   _____     |     |     |
           350,000 |---------------------|--------------_____-----|--|     |----|     |-----|
                   |                     |             |     |    |  |     |    |     |     |
           300,000 |---------------------|---_____-----|     |----|--|     |----|     |-----|
                   |      Phase 1        |  |     |    |     |    |  |     |    |     |     |
Capital    250,000 |---------------------|--|     |----|     |----|--|     |----|     |-----|
Investment         |   Saving = $14.6M   |  |     |    |     |    |  |     |    |     |     |
[US$ x     200,000 |------------____ ----|--|     |----|     |----|--|     |----|     |-----|
 10(3)]            |   ____    |    |    |  |     |    |     |    |  |     |    |     |     |
           150,000 |--|    |---|    |----|--|     |----|     |----|--|     |----|     |-----|
                   |  |    |   |    |    |  |     |    |     |    |  |     |    |     |     |
           100,000 |--|    |---|    |----|--|     |----|     |----|--|     |----|     |-----|
                   |  |    |   |    |    |  |     |    |     |    |  |     |    |     |     |
            50,000 |--|    |---|    |----|--|     |----|     |----|--|     |----|     |-----|
                   |  |    |   |    |    |  |     |    |     |    |  |     |    |     |     |
                 0 |__|____|___|____|____|__|_____|____|_____|____|__|_____|____|_____|_____|
                      ASML       Comp.        ASML      Comp.         ASML       Comp.



</TABLE>

Slide 46


<TABLE>


Lithocell operating cost
                                                                                   Phase 3
 <S>       <C>      <C>                         <C>                      <C>
                    -------------------------------------------------------------------------
                   |                     |                        |   Saving = $10.3M/Year  |
                   |-- X  I-Line --------|------------------------|-------------------------|
                   |   *  KrF            |                        |              -----      |
            45,000 |-- ^  ArF -----------|------------------------|-------------|     |-----|
                   |                     |      Phase 2           |             |     |     |
            40,000 |---------------------|------------------------|-------------|     |-----|
                   |                     |   Saving = $8.2M/Year  |   _____     |     |     |
            35,000 |---------------------|--------------_____-----|--|     |----|     |-----|
                   |                     |             |     |    |  |     |    |     |     |
            30,000 |---------------------|---_____-----|     |----|--|     |----|     |-----|
Operating          |      Phase 1        |  |     |    |     |    |  |     |    |     |     |
 Cost /     25,000 |---------------------|--|     |----|     |----|--|     |----|     |-----|
 Year              |Saving = $2.8M/Year  |  |     |    |     |    |  |     |    |     |     |
[US$ x      20,000 |------------____ ----|--|     |----|     |----|--|     |----|     |-----|
 10(3)]            |   ____    |    |    |  |     |    |     |    |  |     |    |     |     |
            10,000 |--|    |---|    |----|--|     |----|     |----|--|     |----|     |-----|
                   |  |    |   |    |    |  |     |    |     |    |  |     |    |     |     |
            10,000 |--|    |---|    |----|--|     |----|     |----|--|     |----|     |-----|
                   |  |    |   |    |    |  |     |    |     |    |  |     |    |     |     |
             5,000 |--|    |---|    |----|--|     |----|     |----|--|     |----|     |-----|
                   |  |    |   |    |    |  |     |    |     |    |  |     |    |     |     |
                 0 |__|____|___|____|____|__|_____|____|_____|____|__|_____|____|_____|_____|
                      ASML       Comp.        ASML      Comp.         ASML       Comp.



</TABLE>

Slide 47


Cost of ownership

         -------------------------------------------------------
        |                                                        |
        |--------------------------------------------------------| --  ASML
        |                                                        |   | Tota1
        |--------------------------------------------------------|   > Saving
        |                                                        | --|
        |--------------------------------------------------------|
  ^     |                                                        |
  |     |--------------------------------------------------------|
  |     |                  [Graphic Omitted]                     |
  |     |--------------------------------------------------------|
  |     |                                                        |
 Cost   |--------------------------------------------------------|
 (M$)   |                                                        |
        |--------------------------------------------------------|
        |                                                        |
        |--------------------------------------------------------|
        | ^                                                      |
        |-|------------------------------------------------------|
        | |  Capital Investment                                  |
         ---------|---------|-----------|-----------|------------
        0         1         2           3           4           5




Slide 48


ASML value of ownership

                                  Productivity
                                       / \
                                      /   \
                                     /     \
                                    /       \
                                   /         \
                                  /           \
                                 /   Yield     \
                                /               \
                               /                 \
                              ---------------------
        Imaging                                          Overlay


     -------------------------------------------------------------------
   |                      Maximum Good Die per Day                       |
   |                       & Greater Extendibility                       |
     -------------------------------------------------------------------





Slide 49


NO TRADE-OFF BETWEEN ALIGNMENT AND PRODUCTIVITY

                More Alignment Information for Superior Overlay!

                               ---------------------------------------
                              |   No Throughput Penalty for up to 16  |
                              |   Alignment Marks with Twin Stage     |
                               ---------------------------------------
 [Graphic                                         \
  omitted]                                         \
                      ------------------------------------------------
                100 |                                                |
                    |                               Twin Stage       |
                 95 |                                                |
                    |                                                |
                 90 |                                                |
                    |                 [Graphic omitted]              |
                 85 |                                                |
     Throughput %   |                                                |
                 80 |                                                |
                    |             Single Stage                       |
                 75 |             Trade Off Between Alignment        |
                    |             Information & Throughput           |
                 70 |                                                |
 [Graphic           |                                                |
  omitted]       65 |                                                |
                    |                                                |
                 60 |                                                |
                    |                                                |
                 55 |                                                |
                    |                                                |
                 50  ---------|-------|-------|-------|--------|-----
                      2       4       8       16      14      32

                                Number of Alignment Marks




Slide 50

<TABLE>


TWINSCAN DUAL STAGE ADVANTAGE :
Improved overlay with additional alignment marks

                                                                   --------------------------------
                                                                  |                         1      |
Poly                  Twinscan Overlay Measurements               | Alignment Precision =  -----   |
to STI          2, 4, 6, 8, 10, 12, 14, 16, 24 mark pairs         |                      \/  n     |
                   15-wafers including process splits              --------------------------------
                                                                    N = Number of Alignment Points

<S>          <C>                                                                       <C>
               ---------------------------------------------------------------------
              |                                                                     |
Process   30  |---------------------------------------------------------------------|
Overlay       |                                                                     |
[nm]      25  |---------------------------------------------------------------------|   -----------
              |                              [Graphic omitted]                      |  |  X  SPM32 |
          20  |---------------------------------------------------------------------|  |  *  SPM53 |
              |                                                                     |  |  #  SPM74 |
          15  |---------------------------------------------------------------------|   -----------
              |                                                                     |
          10  |---------------------------------------------------------------------|
              |                                                                     |
           5  |---------------------------------------------------------------------|
              |                                                                     |
           0  |_____________________________________________________________________|
                  24    16      14      12      10      8       6       4       2

                                       Alignment Mark Pairs


</TABLE>

Slide 51




THE POWER OF TWO
Better overlay provides higher yield - more good die per wafer


                   Customer Overlay Requirement : ~25% of Design Rule
               ----------------------------------------------------------
          36  |                                                         |
          34  |                [Graphic omitted]                        |
          32  |                                                         |
          30  |                                                         |
Overlay   28  |                                                         |
[nm]      26  |                                                         |
          24  |   Single Stage AB                                       |
          22  |=========================================================|
          20  |                                                         |
          18  |   Single Stage AA                                       |
          16  |=========================================================|
          14  |=========================================================|
          12  |  XT:1250  AB                                            |
          10  |  XT:1250  AA                                            |
           8  |======================================================== |
           6  |_________________________________________________________|
                 130    115     100     90      80      70      65

                                     Design Rule



Slide 52

ASML value of ownership

                                  Productivity
                                       / \
                                      /   \
                                     /     \
                                    /       \
                                   /         \
                                  /           \
                                 /   Yield     \
                                /               \
                               /                 \
                              ---------------------
        Imaging                                          Overlay


     -------------------------------------------------------------------
   |                      Maximum Good Die per Day                       |
   |                       & Greater Extendibility                       |
     -------------------------------------------------------------------


Slide 53


ROOM TO SHRINK
Improved leveling & dynamic performance



  [Graphic omitted]                              Only TWINSCAN dual stage
                                                 system allows modeling of
                                                optimum stage move profile
                                                   for imaging & overlay



 [Graphic omitted] ---------------------------->         [Graphic omitted]

o   Measure Stage: measure height             o   Expose Stage: playback the
    of full wafer with                            optimized stage move profile:
    interferometer precision                      >   best full wafer CDU
                                                  >   smallest MA & MSD
o   Modeling: optimize stage move
    profile per field for
    imaging & overlay



Slide 54


TWINSCAN LEVELLING PERFORMANCE
300mm Wafer


                                               -------------------------------
                                                Mean = 0
                                                3(sigma) = 42 nm

 [Graphic omitted]                                     [Graphic omitted]

                                               -------------------------------
                                                         defocus (nm




     o   Excellent focus Repeatability

     o   Uniform focus distribution across the wafer


Slide 55

<TABLE>

<S>                  <C>                                 <C>         <C>
                                                                     [Graphic
TWINSCAN: Packed with low k1 solutions                 [Graphic       omitted]
                                                        omitted]     AERIAL & QUASAR
                                                       ---------     Pupil Shaping for
                                                          CDU        max E-D windows
                                                       ---------

               [Graphic omitted] Dose Mapper Inter & Intra
                                 Field Dose Correction
[Graphic omitted]
   PUPICOM HV
CD Optimization                                                       [Graphic omitted]
                                                                     Industry Leading Low
[Graphic omitted]                                                    MSD Scanning Balance
Industry Leading                                                     Mass Stages
Low Aberration Lenses

- -------------                 [LARGE Graphic omitted]                        Low stray
Aberrations                                             [Graphic           light optics
- -------------                                            omitted]             & SAMOS
                                                        Pupil Mapper         Automated
[Graphic omitted]                                       for automated       Monitoring
Automated Servo                                         Pupil monitoring
Driven Optics for                               ---------
Low Order                                         Focus
Aberration                                      ---------
Optimization                                                    [Graphic
                             [Graphic         [Graphic           omitted]
[Graphic  Broad band          omitted]         omitted]         Transmission Aerial
 omitted] Focus Sensor        Wafer Mapping    Chuck Spot       Image Sensor for Wafer
          with Optimized       & Playback      Detection &      by Wafer Focus & Lens
          Incidence Angle                      Automated        Heating Verification
                                               Cleaning




</TABLE>

Slide 56


ROOM TO SHRINK
Customized illumination for optimized process windows



          ED Window: Dipole versus Annular
          ---------------------------------  o   Diffractive Optical Elements
         |          -- Annular            |      (DOEs) are designed to provide
         |          ** Dipole 90 degrees  |      customized illumination for
         |                                |      specific process layers at
         |                                |      full productivity
Exposure |          [Graphic              |
Latitude |           omitted]             |  o   LumenShaper together with
(%)      |                                |      QUASAR(TM) enables larger
         |                                |      process windows for increased
         |                                |      yield at low k1 values
          ---------------------------------

                  Focus (um)




Slide 57


   AT:1200 80nm lines CDU performance


            80-nm Dense lines                     80-nm Isolated lines (no AF)
             at Best Focus                                at Best Focus
         ---------------------------              ---------------------------
        |                           |            |                           |
        |                           |            |                           |
        |                           |            |                           |
3s(nm)  |                           |     3s(nm) |                           |
        |          [Graphic         |            |          [Graphic         |
        |           omitted]        |            |           omitted]        |
        |                           |            |                           |
        |                           |            |                           |
        |                           |            |                           |
         ---------------------------              ---------------------------
                 Tool                                          Tool

                              ---------------------------------
                             |  X  Across wafer Nominal Focus |
                             |  *  Across field Nominal Focus |
                              --------------------------------

                                                                ELM data

[Graphic                                                        [Graphic
 omitted]  Yellow fields      [Graphic  13 x 7 points,           omitted]
           are measured        omitted] H and V orientation,
           using ELM                    are measured per die




Slide 58


ROOM TO SHRINK
DoseMapper(TM)[: Improved CD control & greater process latitude




[Graphic
 omitted]
                                                                Field to Field
   Scan Direction     Across Slit
                                                                   [Graphic
  ^  [Graphic         ^ [Graphic                                    omitted]
  |   omitted]        |  omitted]
  |                   |
  |                   |
Scan     Slit       Scan   Slit
      <------->         <------->


          o   Compensates for external sources of non-uniformity

          o   Intra-field dose correction and critical dimension analysis

          o   Allows correction of CD variations over the entire wafer
              resulting in better CD uniformity



Slide 59


CORRECTION OF ETCH FINGERPRINT


      Before correction                         After correction (simulated)
 FWCDU (3(sigma) ) = 18.6 nm                     FWCDU (3(sigma) ) = 4.7 nm


       [Graphic                                        [Graphic
        omitted]                                        omitted]




   o   AT:1200, NA=0.85, (sigma) =0.88-0.58, 80nm Horizontal dense lines, ELM


Slide 60


THE POWER OF TWO
Improved imaging provides higher yield - more good die per wafer


                           Customer CDU Requirement : ~7.5% of Design Rule
                   ----------------------------------------------------------
              15  |                                                         |
              14  |                [Graphic omitted]                        |
              13  |                                                         |
              12  |                                                         |
              11  |                                                         |
              10  |                                                         |
CDU-3          9  |                                                         |
(sigma)[nm])   8  |                                                         |
               7  |   Single Stage                                          |
               6  |=========================================================|
               5  |                                                         |
               4  |=========================================================|
               3  |  XT:1250                                                |
               2  |                                                         |
               1  |                                                         |
               0  |_________________________________________________________|
                     130    115     100     90      80      70      65

                                        Design Rule



Slide 61


    Presentation Outline


    >     Lithography Value Drivers
          for ASML Customers

    >     The TWINSCAN Advantage

             >>     TWINSCAN Overview &
                    XT:1250 Introduction

             >>     Productivity

             >>     Overlay

             >>     Imaging

    >     SUMMARY


Slide 62


TWINSCAN advantage


                                                        DRIVE
                                                        TO THE LIMITS WITH
                                                        Ultra-k1\

                                                        [Graphic omitted]

  [Graphic omitted]                                     TWINSCAN Low k1  ->
                                                        Resolution Extension
                                                        Longer Product Lifetime


TWINSCAN Productivity ->
Lower capital investment                                MAP THE ROAD
Superior cost of ownership                              AHEAD WITH
                                                        DUAL STAGES

 [Graphic omitted]                                      [Graphic omitted]

THE WORLD'S ONLY                                        TWINSCAN Metrology ->
DUAL-STAGE LITHOGRAPHY SYSTEM                           Imaging & Overlay
                                                        More Good Die / Wafer



Slide 63


<TABLE>


ASML TWINSCAN & low k1 advantage

<S>                          <C>                                                        <C>
                                 ASML                                                   Competitor
                |----------------------------------                      |----------------------------------
             12 |                                  |                  12 |                                  |
                |                                  |                     |                                  |
             9  | Process Window                   |                  9  |                                  |
                |                                  |                     |                                  |
Exposure     6  |                                  |       Exposure   6  |                                  |
energy          |                                  |       energy        |                                  |
[%]          3  |          System                  |       [%]        3  |          System                  |
                |           budget                 |                     |           budget                 |
             0  |         [Graphic                 |                  0  |         [Graphic                 |
                |           Omitted]               |                     |           Omitted]               |
            -3  |                                  |                 -3  |                                  |
                |                                  |                     |                                  |
            -6  |                                  |                 -6  |                                  |
                |                                  |                     |                                  |
            -9  |                                  |                 -9  |                                  |
                |                                  |                     |                                  |
           -12  ------------------------------------                 12  ------------------------------------
                -0.3    -0.15    0    0.015     0.3                     -0.3     -0.15    0    0.015     0.3

                            Focus [um]                                                 Focus [um]


                   -------------------------------------------------------------------------
                  |        TWINSCAN & Low k1 Technology enable larger process windows       |
                  |     with greater production stability for less rework & higher yield    |
                   -------------------------------------------------------------------------



</TABLE>

Slide 64


<TABLE>


SUPERIOR OVERLAY & IMAGING = HIGHER YIELD

  What if 1% more yield / wafer ...

<S>                                       <C>                    <C>

                                                              Dual Stage 16 Point Alignment
                                                            vs Single Stage 8 Point Alignment
 Dual Stage Wafer Height Mapping         90nm DRAM
    with Optimum Focus Sensor         Possible Die = 501        [Graphic   [Graphic
 versus Single Stage on the Fly                                 omitted]   omitted]
                                         [Graphic
 [Graphic             [Graphic            omitted]
  omitted]             omitted]
                                                                  [Graphic    Ultra k1 Options
                                                                  omitted]       for Low k1
                                                                                 Production

 [Graphic         Source
  omitted]    optimization

                              [Graphic   Low Aberration Lenses
                               omitted]  Servo Driven Control
                                         & Insitu metrology


                      ---------------------------------------------
                    |   24k Wafers / Month x 501 die x 0.01 x $8   |
                    |          = $1 Million Revenue / Month        |
                      ---------------------------------------------



</TABLE>

Slide 65


ARE LITHOGRAPHY SYSTEMS BECOMING UNAFFORDABLE?


    400x Improvement in Die / Hour / M$
             over last 20 years

                                               ------------------------------
                                              |  Design rule shrink delivers |
                                              |    additional DPH value      |
                                               ------------------------------
                                                            /
         ------------------------------------------------------------
        | DPH fdr = Die per hour with design rule shrink             |
        | DPH = Die per hour [5x5mm die]                             |
        | Tool Cost = Lithography cost ($M)                          |
Tool    |                                                            |
Cost    |                                                            |
($)     |                                                            |
& DPH   |                                             -----------------------
        |          DPH fdr                           | Productivity delivers |
        |                                            |     DPH increase      |
        |                     [Graphic omitted]       -----------------------
        |                                                    /       |
        |                            DPH                             |
        |                                                            |
        |                                  Tool Cost                 |
        |                                                            |
        |                                                  \         |
        |                                             -------------------------
        |                                            |  Technology results in  |
        |                                            |  increasing system cost |
        |                                            -------------------------
        |                                                            |
      -------------------------                  -------------------------
     | 1980                    |                | Today                   |
     | ----                    |--------------- | -----                   |
     | Cost = $0.35 M          |                | Cost = $20M             |
     | Resolution = 1.25(mu)m  |                | Resolution = 0.07 um    |
     | Die Size = 5 mm         |     Time       | Wafer Size = 300 mm     |
     | Wafer Size = 100 mm     |                | WPH (300 mm) = 114      |
     | WPH (100 mm) = 12       |                | Die/Wafer = 2600        |
     | Die/Wafer = 240         |                | Die / Hour = 300,000    |
     | Die / Hour = 2800       |                | Die Size = 0.3 (mu)m    |
     | Die / Hour / M$ = 8000  |                | Die / Hour / M$ = 67M   |
     |                         |                | ------------------------|
      -------------------------



Slide 66


        [Graphic omitted]                   ASML
                                        Commitment

<PAGE>
                                                                   EXHIBIT 99.12


Slide 1


                                  IMEC - ASML
                          Process Technology Platform

                        157nm Lithography Status Update

                                   Kurt Ronse
                        Director Lithography Department
                             IMEC, Leuven (Belgium)


                          Veldhoven, 13 November 2003


Slide 2


Introduction

157nm lithography status update

IMEC 157nm program

Summary and conclusions

Acknowledgements


Slide 3


Introduction

       o       IMEC-ASML process technology platform


157nm lithography status update

IMEC 157nm program

Summary and conclusions

Acknowledgements


Slide 4


                            1984       2003
                            ----       ----
Established by state government       Largest independent R&D center in Europe
                     (Flanders)       Budget: >145M(euro)
        Non-profit organization       Staff: >1270
      Initial budget: 62M(euro)       Collaboration with >450 partners
             Initial Staff: ~70


                               [graphic omitted]


Slide 5


                                                                   Organization
- -------------------------------------------------------------------------------

                             President and CEO
                               G. Declerck
                                      |
                                      |
 Strategic partnerships---------------|-------------Strategic Development Unit
   R. De Keersmaecker                 |                 J. Van Helleputte
                                      |
                                      |
   Technical Support------------------|----------------Business Development
 & Computer Logistics                 |                     L. Deferm
       W. Fluit                       |
                                      |
       Finance------------------------|------------------Human Resources
      A. Vinck                        |                     E. Daenen
                                      |
                                      |
              Scientific Advisor------|
                   H. De Man          |
                                      |
                                      |
                                      |
      --------------------------------|-----------------------------------
      |                      |                |                          |
      |                      |                |                          |
  Design Technology for    Microsystems,  Silicon Process &   Industrialization
Integrated Information &   Components &   Device Technology      & Training in
  Communication Systems     Packaging                          Microelectronics

         DESICS                MCP              SPDT               INVOMEC
      R. Lauwereins        R. Mertens     L. Van Den Hove          H. Maes



Slide 6


                                              (Sub-)45nm Si Technology Research
- -------------------------------------------------------------------------------


     Mission:
- ------------

to perform focused research on

    o    Advanced materials, process steps and modules
    o    Novel device concepts ('beyond classical CMOS')

      For technologies at least two generations ahead of
      manufacturing (> "N+2")


Slide 7


                                                  Si Technology Programs (IIAP)
                                                                       Concept
- -------------------------------------------------------------------------------


                            Advanced R&D on Si Technology
                                  is carried out in
                       Industrial Affiliation Programs (IIAP)

                               [Graphic omitted]

                          IMEC focus on process development
                                     on advanced equipment
                                    with advanced materials


Slide 8


Evolution of IMEC-ASML cooperation
    o    1990 : first ASML 248nm stepper installed at IMEC (PAS5000/70)
                   Industrial affiliation program on 28nm lithography
                   Process training center for ASML application engineers

    o    1999 : first ASML 193nm scanner installed at IMEC (PAS5500/900)
                   Industrial affiliation program on 193nm lithography

    o    2001 : ASML imaging team @ IMEC established (8 FTE)
                   Joint projects on
       o  Optical extension and imaging development
          (e.g. double dipole, chromeless phase shift)
       o  (off-line and integrated) metrology development (e.g. electrical CD,)
       o  Long term exposure tool monitoring
       o  ...
Today
    o    2003 : first ASML 157nm scanner installed at IMEC (Micrascan VII)
                   Industrial affiliation program on 157nm lithography

    o    2004-2007 : plans under discussion ...


Slide 9


                                                  157nm critical challenges :
                                                      ISMT stop light chart
- -------------------------------------------------------------------------------

                      157nm Lithography Report Card 8/03

         Masks               Substrate
                             Pellicle

         Exposure            CaF2 (quality and quantity)
         Tool                Optical material contamination and lifetime
                             Light source (F2 laser)
                             N2 Purging


         Resist              Resist transparency and profiles
                             Process integration aspects


Slide 10


                                                                       Outline
- -------------------------------------------------------------------------------

Introduction

Status of 157nm critical issues
    o    157nm resist status
    o    157nm exposure tool status
    o    157nm pellicle status
    o    157nm mask substrate status

IMEC 157nm program

Summary and conclusions

Acknowledgements


Slide 11


                                                                157nm resists
                                             2000-2001 : Absorbance challenge
- -------------------------------------------------------------------------------
Polymer absorbance: from 6 to below 1/ (mu)m.

                               [Graphic omitted]


Slide 12


                                                                157nm resists
                     2001-2002: resist transparancy allows thickness increase
- -------------------------------------------------------------------------------

                               [Graphic omitted]


Slide 13


                                                                 157nm resists
                                                                  Status today
- -------------------------------------------------------------------------------


                               [Graphic omitted]


State of the art resist
Absorbance < 1.0 / (mu)m.
< 60 nm resolution in 150 nm thickness (NA = 0.85, PSM)

F. Houlihan et al, 4th International Symposium on 157 nm lithography
Exposure:  Exitech NA = 0.85, Selete


Slide 14


                                                                 157nm resists
                                                                  Status today
- -------------------------------------------------------------------------------


                               [Graphic omitted]


Obtained a 60 nm L/S pattern with no footing and no resist thickness loss

Courtesy of Selete and Nissan Chemicals, 4th International Symposium on
157 nm lithography
Exposure:  Exitech NA = 8.5, Selete


Slide 15


                                                                 157nm resists
                                                                       Summary
- -------------------------------------------------------------------------------


Significant resist progress

       o  Absorbance of resist has decreased to below 1/um, allowing imaging in
         resist thicknesses > 150nm

       o  Today's best resists are capable of 60nm1:1 resolution (at 0.85NA,
         PSM) in 150nm thick resist

Further improvements needed

       o  Line edge roughness is a challenge

       o  Etch resistance should be further improved

       o  Post-exposure delay sensitivity (amine contamination)

       o  Resist sensitivity


Slide 16


                                                          157nm exposure tool
                                                            CaF2 improvements
- -------------------------------------------------------------------------------

                               [Graphic omitted]


Slide 17


                                                           157nm exposure tool
                       First full field scanner successfully installed at IMEC
- -------------------------------------------------------------------------------

  [graphic omitted]
                              ASML MicraScanVII step&scan
                                    Platform specs:
                                    Lens reduction ratio: 4X
                                    Lens NA: variable 0.4 to 0.75
                                    Field size: 34 mm x 20 mm
                                    Wafer size: 200 mm
                                    Reticle size: 6" x 6" x 0.25"
                                    Partial coherence range: 0.3 to 0.85
                                    Reticle cleaning unit off-line

                              Interfaced to
                                    TEL Clean Track ACT8

                              ESI TMB-150 Total Amine Monitor



Slide 18


                                                           157nm exposure tool
                       First full field scanner successfully installed at IMEC
- -------------------------------------------------------------------------------

                               [Graphic omitted]


Slide 19


                                                           157nm exposure tool
                       First full field scanner successfully installed at IMEC
- -------------------------------------------------------------------------------

                               [Graphic omitted]


Slide 20


                                                           157nm exposure tool
                                                                       Summary
- -------------------------------------------------------------------------------

Significant progress

       o  First full field exposure tool installed in the field and showing
         acceptable performance

       o  Intrinsic birefringence compensation successful (CaF2 [M111] and
         [100] crystal orientations)

Further learning needed

       o  Long term optical path stability (hydrocarbon and inorganic
         contamination risks mitigated ?)


Slide 21


                                                               157nm pellicle
                                                                    the issue
- -------------------------------------------------------------------------------


                              [Graphic omitted]


Pellicle: to protect pattern from defects


First option : Soft pellicle : 1 (mu)m thick polymer :
     o   Transparency
     o   Radiation hardness


Slide 22


                                                               157nm pellicle
                                                                soft pellicle
- -------------------------------------------------------------------------------


                       [Graphic omitted]

   Data presented at               Data presented at
   157 nm Symposium                157nm Symposium,
   Dana Point CA, May, 2001        Antwerp Belgium, Sept., 2002


Soft pellicle lifetime (initial target : 200J/cm2 at 70% T)
      o   No more progress since mid 2002, focus more on understanding


Slide 23


                                                               157nm pellicle
                                                                soft pellicle
- -------------------------------------------------------------------------------


                              [Graphic omitted]


Pellicle: to protect pattern from defects


First option : Soft pellicle : 1 (mu)m thick polymer :
     o   Transparency
     o   Radiation hardness


Slide 24


                                                               157nm pellicle
                                                                hard pellicle
- -------------------------------------------------------------------------------


                              [Graphic omitted]


Pellicle: to protect pattern from defects


First option : Soft pellicle : 1 (mu)m thick polymer :
     o   Transparency
     o   Radiation hardness

Alternative : Hard or 'thick' pellicle : 800(mu)m thick quartz
     o   Expensive
     o   Optical element (aberrations, distortions)


Slide 25


                                                               157nm pellicle
                                                                      Summary
- -------------------------------------------------------------------------------

Significant hard pellicle progress

       o  All hard pellicle imaging effects are understood and can be
         compensated using lens manipulators


Further improvements needed

       o  Hard pellicle mounting needs to reduce local tilt

       o  Soft pellicle polymer development will improve CoO


Slide 26


                                                         157nm mask substrate
                                                                    the issue
- -------------------------------------------------------------------------------

                               [Graphic omitted]


Surface organic contamination reduces transmission


Slide 27


                                                         157nm mask substrate
                                        VUV cleaning can restore transmission
- -------------------------------------------------------------------------------
Principle VUV cleaning

       o  Expectation that the transmission loss of F-doped quartz by
         CR-airborne contamination is 1-2% (ref. T. Bloomstein et al., ISMT
         157nm reticle handling meeting, San Diego, 2000)

       o  172nm light in presence of oxygen generates dissociated oxygen
         radicals that break atomic bonds

                              [Graphic omitted]


Slide 28


                                                         157nm mask substrate
                                        VUV cleaning can restore transmission
- -------------------------------------------------------------------------------

                               [Graphic omitted]


Slide 29


                                                         157nm mask substrate
                                                                      Summary
- -------------------------------------------------------------------------------

Significant progress

       o  VUV cleaning has been proven to restore mask substrate transmission

Further improvements needed

       o  Handling of reticles in fab, in mask shop, and in transport needs to
         be checked for irreversible transmission degradation on the longer
         term


Slide 30


                                                                       Outline
- -------------------------------------------------------------------------------

Introduction

Status of 157 nm critical issues

IMEC 157nm program
     o   Objectives
     o   Partners
     o   Projects

Summary and conclusions

Acknowledgements


Slide 31


                                               IMEC 157nm Lithography Program
                                                           Program objectives
- -------------------------------------------------------------------------------


IMEC 157 nm Process Program

o  Resist bench making
o  Resist integration on critical layers
o  Optical path monitoring
o  Hard pellicle printing
o  157 nm reticle handling


Slide 32


                                               IMEC 157nm Lithography Program
                                                             Program partners
- -------------------------------------------------------------------------------


IMEC 157 nm Process Program

Int'l Sematech             Equipment suppliers        Non-Sematech members

o  AMD                     o  ASML                    o  Micron
o  HP                      o  TEL                     o  Samsung
o  IBM                     o  JKA - Tencor            o  ST Microelectronics
o  Infineon                o  Lam Research
o  Intel
o  Motorola
o  Philips
o  TI
o  TSMC


Resist suppliers           Merch. mask shops          Software

o  Arch/Fuji Film          o  Ogitribucs              o  Synopsys
o  Clariant                o  Dai Nippon Printing     o  Mentor Graphics
o  JSR                     o  (Toppan Printing)       o  ASML Masktools
o  TOK                     o  (Du Pont)
o  Brewer
o  Nissan Chemical
o  Shin Etsu


Slide 33


                                                                      Outline
- -------------------------------------------------------------------------------

Introduction

Status of 157nm critical issues

IMEC 157nm program

Summary and conclusions

Acknowledgements


Slide 34


                                                      Summary and conclusions
- -------------------------------------------------------------------------------

157nm critical challenges update

       o  157nm resists

                   Steady progress (transmittance and lithographic performance)

                   Significant further progress needed for 45nm node (LER,
                   integration)

       o  Exposure tool (Micrascan VII)

                   The world's first 157nm full field scanner operational at
                   IMEC

                   Long term optical path stability (contamination) to be
                   investigated

       o  Hard pellicle printing

                   Hard pellicle imaging contributions understood and
                   compensated

                   Pellicle-flatness specs for mounting needs to be proven

       o  157nm VUV reticle cleaning

                   Organic contamination effect limited (2-3%) and reversible

                   Reticle handling procedures in wafer fab and mask shop to be
                   investigated (long term reticle usage)

Summary

       o  A lot of technical progress

       o  Still a lot of challenges since target has moved to 45nm node


Slide 35


                                                             Acknowledgements
- -------------------------------------------------------------------------------

Thanks for contributions from

    o    IMEC SPDT/LITHO

    o    ASML 157 nm development teams (Wilton, Veldhoven)

    o    Infineon Technologies (providing the alternating PSM)

    o    Resist vendors (Clariant, TOK, ...)

    o    ISMT (K. Turnquest, G. Feit, K. Dean)

    o    Selete (T. Itani)

Thanks for funding :

    o    Part of this work is sponsored through International Sematech

    o    European Commision : IST-2000-30175 UV2Litho

    o    Medea+ : T401 FLUOR

<PAGE>

                                                                   EXHIBIT 99.13


Slide 1

ASML

IMMERSION LITHOGRAPHY

Jos Benschop
13 Nov 2003


Slide 2


SAFE HARBOR


"Safe Harbor" Statement under the U.S. Private Securities
Litigation Reform Act of 1995: the matters discussed
during this presentation include forward-looking
statements that are subject to risks and uncertainties
including, but not limited to, economic conditions,
product and pricing, manufacturing efficiencies, new
products development, ability to enforce patents,
availability of raw materials and critical manufacturing
equipment, trade environment, and other risks indicated
in filings with the U.S. Securities
and Exchange Commission.


Slide 3


OUTLINE

    o Immersion principle:
      . What is immersion
      . Why immersion
    o Why is ASML TWINSCAN ideally suited for immersion
      . Existing lenses can easily be converted
      . Dry metrology position
    o ASML immersion program:
      . Achievements to date
      . Next steps
    o Conclusions


Slide 4


IMMERSION: LIQUID BETWEEN LENS AND WAFER

                 dry     immersion

              [Graphic omitted]

                     Lens

              gas         liquid        resist
                                        wafer


Slide 5


Why immersion



dry immersion       Convert existing lens to immersion
                    o  Resolution remains same
[Graphic omitted]   o  Increased Depth of Focus
                       o  Larger process window => increased yield
                       o  Decrease double exposure layers, lower cost per wafer

dry immersion       Develop new NA>1 immersion lens
                    o  Increased resolution
[Graphic omitted]      Delay wavelength transition


Slide 6


Existing system, same NA and resolution (1)


[Graphic omitted]           same resolution

                            unchanged lens aperture

                            only rays in the vicinity
                            the wafer change


Slide 7


Existing system, same NA and resolution (2)


[Graphic omitted]           same resolution

                            unchanged lens aperture

                            only rays in the vicinity
                            the wafer change


Slide 8


Existing lens, immersion increases DoF (1)


           [Graphic omitted]


Slide 9


existing lens, immersion increases DoF (2)


 [Graphic omitted]     smaller angles


                         Increased DoF
                         - refractive Index Liquid


Slide 10


new lens, increased NA and resolution (1)


[Graphic omitted]


                    new lens with
                    o increased NA
                    o improved resolution


Slide 11


New lens, increased NA and resolution (2)

[Graphic omitted]

                    Hyper NA (NA>1):
                    no imaging without water,
                    only reflection


Slide 12


Benefits of immersion

[Graphic omitted]

Example:
193 nm, k1 = 0.3, k2 = 1

Increase DOF
with converted lens


Increased resolution with
new NA>1 lens

Resolution 1/2 pitch [nm]


Slide 13


Outline

o   Immersion principle:
    o   What is immersion
    o   Why immersion
o   Why is ASML TWINSCAN ideally suited for immersion
    o   Existing lenses can easily be converted
    o   Dry metrology position
o   ASML immersion program:
    o   Achievements to date
    o   Next steps
o   Conclusions


Slide 14


Not all lenses can be converted to immersion

[Graphic omitted]

Non flat last lens element            large change in optical path
                                      => lens not convertable to immersion


Flat last lens element                minor change in optical path
                                      => lens convertable to immersion

Note: ASML lenses have flat last lens element and can thus be converted to
immersion


Slide 15


Dry vs Wet focus sensing

[Graphic omitted]


Slide 16


Dry vs Wet focus sensing

[Graphic omitted]

     Single stage requires wet-focus sensor:
       new and more difficult process qualification

        Dual stage uses dry-focus sensor:
     proven technology and known process qualification


Slide 17


Outline

o    Immersion principle:
     o   What is immersion
     o   Why immersion
o    Why is ASML TWINSCAN ideally suited for immersion
     o   Existing lenses can easily be converted
     o   Dry metrology position
o    ASML immersion program:
     o   Achievements to date
     o   Next steps
o    Conclusions


Slide 18


Immersion in 3 steps

                   Q2                           Q4
                  2003                         2003

     step 1                    step 2                          step 3
basic experiments        proof-of-concept                 commercial tools

o   fluid definition
o   fluid containment
o   edge scan effects
o   fluid effects
    o   pressure
    o   bubbles
o   chemical effects
    o   resist
o   hyper NA imaging
    o   NA
    o   Illumination
o   platform


Slide 19


Partners in step 1
<TABLE>
<CAPTION>

                           ASML    ASML     ASML    Philips    Zeiss    material   ISMT
                           VhV    Wilton    TDC      R&D                suppliers
- ----------------------------------------------------------------------------------------

<S>                         <C>     <C>    <C>       <C>         <C>       <C>
o fluid definition        Plat-   Resist   High     Immersion  Optics     157nm
o fluid containment       form    inter-    NA       concepts  concepts
o edge scan effects     concepts  facing  concepts
o fluid effects
    o  pressure
    o  bubbles
o  chemical effects
    o  resist                                                             193nm
o  hyper NA imaging
    o  NA
    o  Illumination
o  platform

</TABLE>


Slide 20


Immersion 193nm fluid

H2O

[Graphic omitted]


Slide 21


Immersion 157nm fluid

10.  New liquids improve chances for immersion litho

by Peter Clarke, Silicon Strategies

AUSTIN, Texas --  One of the technical problems plaguing the future of
157-nanometer immersion lithography appears much closer to being solved.

Scientists at DuPont Co. central research (Wilmington, Del.) report they have
found a way to extend immersion techniques -- which work very well to extend
193-nm lithography -- into 157-nm lithography generation.

Roger French, who led the team of immersion chemistry researchers, presented
work on several new candidates for immersion lithography at the 157-nm
wavelength at the Fourth International Symposium on 157-nm Lithography, held
recently in Yokohama, Japan.

http://www.siliconstrategies.com/article/showArticle.jhtml?articleID=14700134
- -----------------------------------------------------------------------------


Slide 22


Fluid thickness and scan speed limitations

Optical issues

  o     transmission loss

  o     pupil apodization

  o     temperature impact on focus and aberrations

Hydro-dynamical issues

  o     shear forces

  o     laminar flow condition


Slide 23


Fluid thickness and scan speed limitations

Optical issues

                           193nm 157nm
T(f) = 10^(-k*d)   k[/cm] 0.032  0.6

o     transmission loss

o     pupil apodization

o     temperature impact on focus and aberrations

Hydro-dynamical issues

o    shear forces

o    laminar flow condition


Slide 24


Fluid thickness and scan speed limitations

Optical issues

  o    transmission loss

  o    pupil apodization [graphic omitted]

  o    temperature impact on focus and aberrations

Hydro-dynamical issues

  o    shear forces

  o    laminar flow condition


Slide 25


Fluid thickness and scan speed limitations


Optical issues

  o    transmission loss

  o    pupil apodization

  o    temperature impact on focus and aberrations

Hydro-dynamical issues

  o    shear forces

  o    laminar flow condition

[Graphic omitted]


Slide 26


Extensive resist screening


  top coat                 no top coat

[Graphic omitted]

Many existing resists with added top coat are immersion compatible


Slide 27


Static 80nm L/S images (160nm pitch)

[Graphic omitted]


Slide 28


      Immersion in 3 steps

                        Q2                             Q4
                       2003                           2003

      step 1                         step 2                       step 3
basic experiments               proof-of-concept             commercial tools
- -------------------------------------------------------------------------------

o    fluid definition      o   Converted 1150 lens
o    fluid containment         o  Wavelength 193 nm
o    edge scan effects         o  NA = 0.75
o    fluid effects             o  field 26 x 33mm
     o  pressure           o   Converted AT platform
     o  bubbles                o  liquid handling
o    chemical effects          o  full scan speed
     o  resist                 o  expose on center
o    hyper NA imaging             and edge
     o  NA                 o   Imaging @ 90 nm demon-
     o  Illumination           strating increase
o    platform                  of DOF



Slide 29


Modules have been tested and integrated

[Graphic omitted]


Slide 30


Intensity contours measured with image sensor


Dry (NA=0.75, (sigma)=0.55/0.85)           Wet (NA=0.75, (sigma)=0.55/0.85)


                               [Graphic omitted]



                      DOF improvement in hydraulic image


Slide 31


AT:1150i, 90nm dense lines and spaces

                              [Graphic omitted]


Slide 32


AT:1150i 90nm dense lines&spaces
CD Uniformity

                        CD Variations
                        Reticle error corrected


                                    3 sigma [nm]
DRY                 -0.1               0.004
                    Best Focus         0.004
                    0.1                0.005

                    Through Focus      0.004






                                    3 sigma [nm]
WET                 -0.1               0.003
                    Best Focus         0.003
                    0.1                0.003

                    Through Focus      0.003




                         CDU results wet as good as dry


Slide 33


AT:1150i 90nm dense lines&spaces
Size Linearity


[Graphic omitted]




Comparable performance
dry and wet


Slide 34


AT:1150i, 90nm isolated line


[Graphic omitted]


Slide 35


AT:1150i 90nm isolated lines
Exposure Latitude vs DOF at scanspeed


[Graphic omitted]


Slide 36


AT:1150i 90nm dense lines&spaces
CD Uniformity

                        CD Variations
                        Reticle error corrected


                                    3 sigma [nm]
DRY                 -0.1               0.004
                    Best Focus         0.004
                    0.1                0.003

                    Through Focus      0.004






                                    3 sigma [nm]
WET                 -0.1               0.003
                    Best Focus         0.004
                    0.1                0.004

                    Through Focus      0.004




                         CDU results wet as good as dry


Slide 37


AT:1150i 90nm isolated lines
Size Linearity


[Graphic omitted]




Comparable performance
dry and wet


Slide 38


AT:1150i, 130nm Iso Contact Hole

[Graphic omitted]

DOF: 1.200 (mu)m
> 2x larger than dry AT:1150


Slide 39


<TABLE>
Immersion in 3 steps

<CAPTION>
                      Q2                                      Q4
                     2003                                    2003

      step 1                        step 2                                step 3
basic experiments                proof-of-concept                     commercial tools

<S>                             <C>                             <C>
o    fluid definition           o    Converted 1150 lens         o    ArF immersion
o    fluid containment               o    Wavelength 193 nm           o    Convert existing lenses (.85 NA, >.9 NA)
o    edge scan effects               o    NA = 0.75                        o    Process Development tools
o    fluid effects                   o    field 26 x 33mm                       o    Increased DOF => increased
     o    pressure                                                                   process margin
     o    bubbles               o    Converted AT platform            o    New lens designs NA > 1.0
o    chemical effects                o    liquid handling                       o    Alternative to 157-dry
     o    resist                     o    full scan speed                            @ 45 nm node
o    hyper NA imaging
     o    NA                         o    expose on center and   o    F2 immersion
     o    Illumination                    edge                        o    Need to find usable liquid
o    platform                                                         o    Adapt existing lenses (.85 NA)
                                o    Imaging @ 90 nm                            o    Process Development tools
                                     demonstrating increase           o    New lens designs NA > 1.0
                                     of DOF                                     o    Alternative to EUV
                                                                                     @ 32 nm node
</TABLE>


Slide 40


Conclusions

o    ASML understands the science, application and market opportunities
     for immersion lithography.
o    TWINSCAN platform is ideally suited for immersion:
     o    Flat last lens element allows adaptation of existing lenses
          to immersion enabling process development.
     o    Dry focus and overlay position.
o    Successful proof-of-concept AT:1150i full field immersion scanner.
o    Open questions remain related to immersion,
     e.g. defect density, which can be investigated with immersion scanners.
o    ASML is finalizing system design hyper-NA 193 immersion scanner.


Slide 41


ASML
Commitment

</TEXT>
</DOCUMENT>
</SEC-DOCUMENT>
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