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<SEC-DOCUMENT>0000950123-10-071486.txt : 20100803
<SEC-HEADER>0000950123-10-071486.hdr.sgml : 20100803
<ACCEPTANCE-DATETIME>20100803072440
ACCESSION NUMBER:		0000950123-10-071486
CONFORMED SUBMISSION TYPE:	6-K
PUBLIC DOCUMENT COUNT:		3
CONFORMED PERIOD OF REPORT:	20100803
FILED AS OF DATE:		20100803
DATE AS OF CHANGE:		20100803

FILER:

	COMPANY DATA:	
		COMPANY CONFORMED NAME:			ASML HOLDING NV
		CENTRAL INDEX KEY:			0000937966
		STANDARD INDUSTRIAL CLASSIFICATION:	SPECIAL INDUSTRY MACHINERY, NEC [3559]
		IRS NUMBER:				000000000
		FISCAL YEAR END:			1231

	FILING VALUES:
		FORM TYPE:		6-K
		SEC ACT:		1934 Act
		SEC FILE NUMBER:	001-33463
		FILM NUMBER:		10985739

	BUSINESS ADDRESS:	
		STREET 1:		DE RUN 6501
		CITY:			DR VELDHOVEN
		STATE:			P7
		ZIP:			5504
		BUSINESS PHONE:		31402683000

	MAIL ADDRESS:	
		STREET 1:		P.O. BOX 324
		CITY:			AH VELDHOVEN
		STATE:			P7
		ZIP:			5500

	FORMER COMPANY:	
		FORMER CONFORMED NAME:	ASM LITHOGRAPHY HOLDING NV
		DATE OF NAME CHANGE:	19950215
</SEC-HEADER>
<DOCUMENT>
<TYPE>6-K
<SEQUENCE>1
<FILENAME>u09484e6vk.htm
<DESCRIPTION>6-K
<TEXT>
<HTML>
<HEAD>
<TITLE>e6vk</TITLE>
</HEAD>
<BODY bgcolor="#FFFFFF">
<!-- PAGEBREAK -->
<DIV style="font-family: 'Times New Roman',Times,serif">


<DIV style="width: 100%; border-bottom: 2pt solid black; font-size: 1pt">&nbsp;</DIV>
<DIV style="width: 100%; border-bottom: 1pt solid black; font-size: 1pt">&nbsp;</DIV>




<DIV align="center" style="font-size: 14pt; margin-top: 12pt"><B>SECURITIES AND EXCHANGE COMMISSION</B>
</DIV>

<DIV align="center" style="font-size: 12pt"><B>Washington, D.C. 20549</B>
</DIV>

<DIV align="center" style="font-size: 12pt"><B><DIV align="center"><DIV style="FONT-size: 3pt; margin-top: 16pt; width: 26%; border-top: 1px solid #000000">&nbsp;</DIV></DIV></B>
</DIV>

<DIV align="center" style="font-size: 18pt; margin-top: 12pt"><B>FORM 6-K</B>
</DIV>


<DIV align="center" style="font-size: 12pt; margin-top: 12pt"><B>REPORT OF A FOREIGN ISSUER<BR>
PURSUANT TO RULE 13A-16 OR 15D-16<BR>
OF THE SECURITIES EXCHANGE ACT OF 1934</B>
</DIV>

<DIV align="center" style="font-size: 10pt; margin-top: 12pt"><B>For August&nbsp;3, 2010</B></DIV>

<DIV align="center" style="font-size: 12pt"><B><DIV align="center"><DIV style="FONT-size: 3pt; margin-top: 16pt; width: 26%; border-top: 1px solid #000000">&nbsp;</DIV></DIV></B>
</DIV>

<DIV align="center" style="font-size: 24pt; margin-top: 12pt"><B>ASML Holding N.V.</B>
</DIV>

<DIV align="center" style="font-size: 10pt; margin-top: 12pt">De Run 6501<BR>
5504 DR Veldhoven<BR>
The Netherlands</DIV>

<DIV align="center" style="font-size: 10pt">(<I>Address of principal executive offices</I>)</DIV>


<DIV align="center" style="font-size: 10pt"><DIV align="center"><DIV style="FONT-size: 3pt; margin-top: 16pt; width: 26%; border-top: 1px solid #000000">&nbsp;</DIV></DIV></DIV>


<DIV align="left" style="font-size: 10pt; margin-top: 6pt">Indicate by check mark whether the registrant files or will file annual reports under cover of Form
20-F or Form 40-F.
</DIV>

<DIV align="center" style="font-size: 10pt; margin-top: 12pt">Form&nbsp;20-F&nbsp;<FONT style="font-family: Wingdings">&#254;</FONT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Form&nbsp;40-F&nbsp;<FONT style="font-family: Wingdings">&#111;</FONT></DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">Indicate by check mark whether the registrant by furnishing the information contained in this Form
is also thereby furnishing the information to the Commission pursuant to Rule&nbsp;12g3-2(b) under the
Securities Exchange Act of 1934.
</DIV>


<DIV align="center" style="font-size: 10pt; margin-top: 18pt">Yes&nbsp;<FONT style="font-family: Wingdings">&#111;</FONT>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;No&nbsp;<FONT style="font-family: Wingdings">&#254;</FONT>
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">If &#147;Yes&#148; is marked, indicate below the file number assigned to the registrant in connection with
Rule&nbsp;12g3-2(b):
</DIV>


<DIV style="width: 100%; border-bottom: 1pt solid black; margin-top: 10pt; font-size: 1pt">&nbsp;</DIV>
<DIV style="width: 100%; border-bottom: 2pt solid black; font-size: 1pt">&nbsp;</DIV>





<P align="center" style="font-size: 10pt"><!-- Folio -->&nbsp;<!-- /Folio -->
</DIV>

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<P><HR noshade><P>
<H5 align="left" style="page-break-before:always">&nbsp;</H5><P>

<DIV style="font-family: 'Times New Roman',Times,serif">






<DIV align="right" style="font-size: 10pt; margin-top: 12pt"><IMG src="u09484u0948401.gif" alt="(ASML LOGO)">
</DIV>


<DIV align="left" style="font-size: 10pt; margin-top: 12pt"><U><B>Exhibits</B></U>
</DIV>


<DIV style="margin-top: 6pt">
<TABLE width="100%" border="0" cellpadding="0" cellspacing="0" style="font-size: 10pt">

<TR valign="top" style="font-size: 10pt; color: #000000; background: transparent">
    <TD width="3%" nowrap align="left">99.1</TD>
    <TD width="1%">&nbsp;</TD>
    <TD>&#147;Chip Makers Adopt ASML&#146;s Holistic Lithography to Continue Moore&#146;s Law,&#148; press release dated
July&nbsp;13, 2010</TD>
</TR>

</TABLE>
</DIV>
<DIV align="left" style="font-size: 10pt; margin-top: 6pt">&#147;Safe Harbor&#148; Statement under the US Private Securities Litigation Reform Act of 1995: the matters
discussed in this document may include forward-looking statements, including statements made about
our outlook, realization of backlog, IC unit demand, financial results, average selling price,
gross margin and expenses. These forward looking statements are subject to risks and uncertainties
including, but not limited to: economic conditions, product demand and semiconductor equipment
industry capacity, worldwide demand and manufacturing capacity utilization for semiconductors (the
principal product of our customer base), including the impact of general economic conditions on
consumer confidence and demand for our customers&#146; products, competitive products and pricing, the
impact of manufacturing efficiencies and capacity constraints, the pace of new product development
and customer acceptance of new products, our ability to enforce patents and protect intellectual
property rights, the risk of intellectual property litigation, availability of raw materials and
critical manufacturing equipment, trade environment, changes in exchange rates and other risks
indicated in the risk factors included in ASML&#146;s Annual Report on Form 20-F and other filings with
the US Securities and Exchange Commission.
</DIV>






<P align="center" style="font-size: 10pt"><!-- Folio -->2<!-- /Folio -->
</DIV>

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<H5 align="left" style="page-break-before:always">&nbsp;</H5><P>

<DIV style="font-family: 'Times New Roman',Times,serif">




<DIV align="left" style="font-size: 10pt; margin-top: 6pt">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<B>SIGNATURES</B>
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Pursuant to the requirements of the Securities Exchange Act of 1934, the registrant has duly
caused this report to be signed on its behalf by the undersigned, thereunto duly authorized.
</DIV>

<TABLE width="100%" border="0" cellspacing="0" cellpadding="0" style="font-size: 10pt">
<TR>
    <TD width="48%">&nbsp;</TD>
    <TD width="1%">&nbsp;</TD>
    <TD width="1%">&nbsp;</TD>
    <TD width="35%">&nbsp;</TD>
    <TD width="15%">&nbsp;</TD>
</TR>
<TR>
    <TD valign="top" align="left">&nbsp;</TD>
    <TD colspan="3" align="left">ASML HOLDING N.V. (Registrant)<BR>
&nbsp;</TD>
    <TD>&nbsp;</TD>
</TR><TR>
    <TD align="left">Date: August 3, 2010&nbsp;</TD>
    <TD valign="top">By:&nbsp;&nbsp;</TD>
    <TD colspan="2" style="border-bottom: 1px solid #000000" align="left">/s/ Peter T.F.M. Wennink
&nbsp;</TD>
    <TD>&nbsp;</TD>
</TR><TR>
    <TD align="left">&nbsp;</TD>
    <TD>&nbsp;</TD>
    <TD colspan="2" align="left">Peter T.F.M. Wennink&nbsp;</TD>
    <TD>&nbsp;</TD>
</TR><TR>
    <TD align="left">&nbsp;</TD>
    <TD>&nbsp;</TD>
    <TD colspan="2" align="left">Executive Vice President<BR>
and Chief Financial Officer&nbsp;</TD>
    <TD>&nbsp;</TD>
</TR>

</TABLE>

<P align="center" style="font-size: 10pt"><!-- Folio -->3<!-- /Folio -->
</DIV>

</BODY>
</HTML>
</TEXT>
</DOCUMENT>
<DOCUMENT>
<TYPE>EX-99.1
<SEQUENCE>2
<FILENAME>u09484exv99w1.htm
<DESCRIPTION>EXHIBIT 99.1
<TEXT>
<HTML>
<HEAD>
<TITLE>exv99w1</TITLE>
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<BODY bgcolor="#FFFFFF">
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<DIV style="font-family: 'Times New Roman',Times,serif">


<TABLE width="100%" border="0" cellspacing="0" cellpadding="0" style="font-size: 10pt">
<TR>
    <TD width="48%">&nbsp;</TD>
    <TD width="1%">&nbsp;</TD>
    <TD width="1%">&nbsp;</TD>
    <TD width="35%">&nbsp;</TD>
    <TD width="15%">&nbsp;</TD>
</TR>

</TABLE>

<DIV align="right" style="font-size: 10pt; margin-top: 12pt"><B>Exhibit&nbsp;99.1</B>
</DIV>


<DIV align="left" style="font-size: 10pt; margin-top: 6pt">Media Relations Contacts<BR>
Lucas van Grinsven &#151; Corporate Communications &#151; &#043;31 40 268 3949 &#151; Veldhoven, the Netherlands<BR>
Ryan Young &#151; Communication US &#151; &#043;1 480 383 4733 &#151; Tempe, Arizona, USA

</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">Investor Relations Contacts<BR>
Craig DeYoung &#151; Investor Relations &#151; &#043;1 480 383 4005 &#151; Tempe, Arizona, USA<BR>
Franki D&#146;Hoore &#151; Investor Relations &#151; &#043;31 40 268 6494 &#151; Veldhoven, the Netherlands

</DIV>

<DIV align="center" style="font-size: 10pt; margin-top: 18pt"><B>Chip Makers Adopt ASML&#146;s Holistic Lithography to Continue Moore&#146;s Law</B>
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">San Francisco, Calif., July&nbsp;13, 2010 &#151; ASML Holding NV (ASML)&nbsp;today at SEMICON West announces broad
customer adoption of holistic lithography products which optimize semiconductor scanner performance
and provide a faster start to chip production. 100% of ASML&#146;s leading-edge scanners are now sold
with one or more holistic lithography components. Semiconductor manufacturers face increasingly
smaller margins of error as they shrink chip features. Holistic lithography provides a way to
shrink within these margins to continue Moore&#146;s Law.
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">Introduced a year ago at SEMICON West 2009 ASML&#146;s holistic lithography suite of products enable
continued shrink and provide customers with higher yield, sooner. Holistic lithography integrates
computational lithography, wafer lithography and process control to optimize production tolerances
and reduce &#147;time to money&#148; for chip makers. All of our customers have adopted multiple products
from the holistic product portfolio into research &#038; development (R&#038;D) as well as volume
manufacturing. Products like Source Mask Optimization (SMO), FlexRay, LithoTuner, Baseliner and
YieldStar are in use worldwide.
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">ASML also offers holistic lithography as an integrated package called EclipseTM, which is tailored
to a specific customer, node and application, and which enables chip makers to squeeze every last
bit of performance out of the chip making process and to enter volume production at the earliest
possible time. A significant number of ASML&#146;s advanced customers have adopted an integrated Eclipse
package.
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">&#147;Most chip makers have found that for current and future process nodes, independent optimization of
process steps is insufficient. The entire litho process must be integrated and co-optimized for the
best performance. Eclipse extends the capabilities of their hardware and helps them to produce
chips with smaller geometries,&#148; said Bert Koek, senior vice president, applications product group
at ASML. &#147;With detailed knowledge of our scanner characteristics and interfaces we can work closely
with our customers to integrate computational lithography solutions during R&#038;D, and implement
customized improvement targets during manufacturing.&#148;
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">Customers who have adopted Eclipse are seeing the results. STMicroelectronics for example will
incorporate Eclipse in conjunction with a TWINSCAN NXT:1950i scanner for their 28-nanometer (nm)
node. The key deliverables of the package are on-product specifications for both overlay and
critical dimension uniformity (CDU). The 28-nm Eclipse package for ST includes a full range of
products from ASML, including scanner tuning products, immersion scanner application, stabilization
and conditioning; and the ASML applications support to achieve the specified targets. Preparations
for Eclipse at the next node have started with a feasibility study on 20-nm critical layer printing
options.
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">&#147;To optimize development cycle times and manufacturing solutions for 28-nm and beyond, ST is
working closely with ASML to define targets, processes and design parameters,&#148; said Joel Hartmann,
Technology R&#038;D Group VP and General Manager Advanced CMOS,
</DIV>
<P align="center" style="font-size: 10pt"><!-- Folio -->&nbsp;<!-- /Folio -->
</DIV>

<!-- PAGEBREAK -->
<P><HR noshade><P>
<H5 align="left" style="page-break-before:always">&nbsp;</H5><P>

<DIV style="font-family: 'Times New Roman',Times,serif">


<DIV align="left" style="font-size: 10pt; margin-top: 6pt">Derivatives and eNVM technology,
STMicroelectronics, at Crolles, France. &#147;ASML&#146;s Eclipse packages include application products,
custom project deliverables and application support that enable joint process optimization.&#148;
</DIV>


<DIV align="left" style="font-size: 10pt; margin-top: 12pt"><B>About Holistic Lithography and Eclipse</B>
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">The semiconductor industry is driven by shrink that reduces manufacturing cost and improves device
performance. However, as semiconductor feature sizes shrink, so do process windows &#151; the accuracy
tolerances necessary to produce viable chips &#151; imposing extremely tight requirements on parameters
such as overlay and critical dimension uniformity (CDU). Independent optimization of separate
parameters is no longer sufficient and holistic lithography intelligently integrates computational
lithography, wafer lithography and process control.
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">During the chip design phase ASML&#146;s holistic lithography uses actual scanner profiles and tuning
capabilities to create a design with the maximum process window for a given node and application.
Once in manufacturing, ASML holistic lithography optimizes a scanner for a specific pattern or
reticle, and monitors and controls litho-cell overlay and CDU performance over time to continuously
maintain the system centered in the process window. Integrated into the Eclipse suite of products
are:
</DIV>


<DIV style="margin-top: 6pt">
<TABLE width="100%" border="0" cellpadding="0" cellspacing="0" style="font-size: 10pt">


<TR valign="top" style="font-size: 10pt; color: #000000; background: transparent">
    <TD width="2%" style="background: transparent">&nbsp;</TD>
    <TD width="3%" nowrap align="left"><B>&#149;</B></TD>
    <TD width="1%">&nbsp;</TD>
    <TD>FlexRay uses a programmable array of thousands of individually adjustable micro-mirrors.
It can create any pupil shape in a matter of minutes &#151; eliminating the long cycle time
associated with diffractive optical element (DOE)&nbsp;design and fabrication and thus
accelerating ramp to yield for low k1 designs.</TD>
</TR>

<TR>
    <TD style="font-size: 6pt">&nbsp;</TD>
</TR><TR valign="top" style="font-size: 10pt; color: #000000; background: transparent">
    <TD width="2%" style="background: transparent">&nbsp;</TD>
    <TD width="3%" nowrap align="left"><B>&#149;</B></TD>
    <TD width="1%">&nbsp;</TD>
    <TD>Tachyon SMO co-optimizes and analyzes scanner source and mask design simultaneously,
ensuring an optimized process window from R&#038;D through production while minimizing pitch and
number of exposures per layer.</TD>
</TR>

<TR>
    <TD style="font-size: 6pt">&nbsp;</TD>
</TR><TR valign="top" style="font-size: 10pt; color: #000000; background: transparent">
    <TD width="2%" style="background: transparent">&nbsp;</TD>
    <TD width="3%" nowrap align="left"><B>&#149;</B></TD>
    <TD width="1%">&nbsp;</TD>
    <TD>BaseLiner enables optimized process windows and higher yields by keeping scanner
performance to a pre-defined baseline condition.</TD>
</TR>

<TR>
    <TD style="font-size: 6pt">&nbsp;</TD>
</TR><TR valign="top" style="font-size: 10pt; color: #000000; background: transparent">
    <TD width="2%" style="background: transparent">&nbsp;</TD>
    <TD width="3%" nowrap align="left"><B>&#149;</B></TD>
    <TD width="1%">&nbsp;</TD>
    <TD>YieldStar offers a single sensor solution for CD, overlay and sidewall angle metrology
resulting in high-speed, high precision and high-accuracy measurement.</TD>
</TR>

<TR>
    <TD style="font-size: 6pt">&nbsp;</TD>
</TR><TR valign="top" style="font-size: 10pt; color: #000000; background: transparent">
    <TD width="2%" style="background: transparent">&nbsp;</TD>
    <TD width="3%" nowrap align="left"><B>&#149;</B></TD>
    <TD width="1%">&nbsp;</TD>
    <TD>LithoTuner optimizes the scanner in an application specific manner. By combining device
pattern information and scanner specific characteristics, the optimum setting for maximum
process window and flexibility will be determined.</TD>
</TR>

</TABLE>
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 12pt"><B>About ASML</B>
</DIV>

<DIV align="left" style="font-size: 10pt; margin-top: 6pt">ASML is the world&#146;s leading provider of lithography systems for the semiconductor industry,
manufacturing complex machines that are critical to the production of integrated circuits or chips.
Headquartered in Veldhoven, the Netherlands, ASML is traded on Euronext Amsterdam and NASDAQ under
the symbol ASML. ASML has more than 6,600 employees (expressed in full time equivalents), serving
chip manufacturers in more than 60 locations in 15 countries. More information about Eclipse,
including a new video is available on our website: www.asml.com
</DIV>



<P align="center" style="font-size: 10pt"><!-- Folio -->&nbsp;<!-- /Folio -->
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`
end
</TEXT>
</DOCUMENT>
</SEC-DOCUMENT>
-----END PRIVACY-ENHANCED MESSAGE-----
